component

CD74HCT174M96

Public Made by Adom

by adom

Texas Instruments Flip Flops, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogiccd74hct174m96factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

CD74HCT174M96

Texas Instruments · Flip Flops · SOP-16

CD74HCT174M96 from Texas Instruments, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input Asynchronous common master reset, active low; when low it sets all Q outputs low (HCT input load 0.55 unit load).
2 Q0 output Flip-flop 0 output, driven from D0 on the low-to-high CP transition; drives 10 LSTTL loads.
3 D0 input Data input for flip-flop 0, transferred to Q0 on the rising edge of CP (HCT input load 0.15 unit load).
4 D1 input Data input for flip-flop 1, transferred to Q1 on the rising edge of CP (HCT input load 0.15 unit load).
5 Q1 output Flip-flop 1 output, driven from D1 on the low-to-high CP transition; drives 10 LSTTL loads.
6 D2 input Data input for flip-flop 2, transferred to Q2 on the rising edge of CP (HCT input load 0.15 unit load).
7 Q2 output Flip-flop 2 output, driven from D2 on the low-to-high CP transition; drives 10 LSTTL loads.
8 GND power_in Ground, 0V reference.
9 CP input Common buffered positive-edge-triggered clock input (HCT input load 0.80 unit load).
10 Q3 output Flip-flop 3 output, driven from D3 on the low-to-high CP transition; drives 10 LSTTL loads.
11 D3 input Data input for flip-flop 3, transferred to Q3 on the rising edge of CP (HCT input load 0.15 unit load).
12 Q4 output Flip-flop 4 output, driven from D4 on the low-to-high CP transition; drives 10 LSTTL loads.
13 D4 input Data input for flip-flop 4, transferred to Q4 on the rising edge of CP (HCT input load 0.15 unit load).
14 D5 input Data input for flip-flop 5, transferred to Q5 on the rising edge of CP (HCT input load 0.15 unit load).
15 Q5 output Flip-flop 5 output, driven from D5 on the low-to-high CP transition; drives 10 LSTTL loads.
16 VCC power_in Positive supply; HCT types operate from 4.5V to 5.5V, absolute maximum -0.5V to 7V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD74HCT174M96
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hct174m96-etched.step / cd74hct174m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hct174m96.step / cd74hct174m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 5b814b9a6a76d926, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF