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Initial commit: component/cd74hct173m96

Ray ·41378c2224 ·2d ago
2 files changed +261
README.mdadded+53
@@ -0,0 +1,53 @@+# CD74HCT173M96++**Texas Instruments** · Flip Flops · SOIC-16++CD74HCT173M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE1 | input | Active-low output enable 1; outputs go to high-impedance when either OE1 or OE2 is high, without affecting flip-flop operation. |+| 2 | OE2 | input | Active-low output enable 2; outputs go to high-impedance when either OE1 or OE2 is high, without affecting flip-flop operation. |+| 3 | Q0 | tri_state | Three-state buffered Q output of flip-flop 0, able to drive 15 LSTTL loads. |+| 4 | Q1 | tri_state | Three-state buffered Q output of flip-flop 1, able to drive 15 LSTTL loads. |+| 5 | Q2 | tri_state | Three-state buffered Q output of flip-flop 2, able to drive 15 LSTTL loads. |+| 6 | Q3 | tri_state | Three-state buffered Q output of flip-flop 3, able to drive 15 LSTTL loads. |+| 7 | CP | input | Shared clock input; Q outputs change on the positive-going (low-to-high) clock edge. |+| 8 | GND | power_in | Ground supply pin. |+| 9 | E1 | input | Data enable 1; when E1 or E2 is high, Q outputs are fed back and the flip-flops hold their state on the clock edge. |+| 10 | E2 | input | Data enable 2; when E1 or E2 is high, Q outputs are fed back and the flip-flops hold their state on the clock edge. |+| 11 | D3 | input | Data input to flip-flop 3, sampled on the rising clock edge. |+| 12 | D2 | input | Data input to flip-flop 2, sampled on the rising clock edge. |+| 13 | D1 | input | Data input to flip-flop 1, sampled on the rising clock edge. |+| 14 | D0 | input | Data input to flip-flop 0, sampled on the rising clock edge. |+| 15 | MR | input | Master reset input; taking MR to logic high resets the flip-flops (Q low). |+| 16 | VCC | power_in | Positive supply; 4.5 V to 5.5 V for HCT types, with a 0.1-µF bypass capacitor recommended close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74HCT173M96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd74hct173m96-etched.step` / `cd74hct173m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hct173m96.step` / `cd74hct173m96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hct173) (26 pp, sha256 `6ad3dbf1cefe1afb`, retrieved 2026-10-06, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hct173m96-datasheet.pdf)
page.jsonadded+208
@@ -0,0 +1,208 @@+{+  "slug": "cd74hct173m96",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Flip Flops, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "cd74hct173m96",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd74hct173m96.kicad_sym",+    "cd74hct173m96.kicad_mod",+    "cd74hct173m96.glb",+    "cd74hct173m96.step",+    "cd74hct173m96.lbr",+    "docs/hero.png",+    "docs/cd74hct173m96-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "cd74hct173m96-hero.glb",+    "cd74hct173m96-hero.overlay.json"+  ],+  "component": {+    "mpn": "CD74HCT173M96",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Logic",+    "subcategory": "Flip Flops",+    "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hct173",+    "parts": {+      "symbol": "cd74hct173m96.kicad_sym",+      "footprint": "cd74hct173m96.kicad_mod",+      "model_3d": "cd74hct173m96-hero.glb",+      "model_3d_plain": "cd74hct173m96.glb",+      "model_3d_step": "cd74hct173m96-etched.step",+      "model_3d_step_plain": "cd74hct173m96.step",+      "lbr": "cd74hct173m96.lbr"+    },+    "distributor_links": {+      "lcsc": 3827006,+      "digikey": "2156-CD74HCT173M96-HCTR-ND",+      "mouser": "595-CD74HCT173M96"+    },+    "distributor_check": {+      "checked_at": "2026-10-06T04:10:42Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "2156-CD74HCT173M96-HCTR-ND",+        "status": "found",+        "lifecycle": "Obsolete"+      },+      "mouser": {+        "pn": "595-CD74HCT173M96",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OE1",+        "type": "input",+        "description": "Active-low output enable 1; outputs go to high-impedance when either OE1 or OE2 is high, without affecting flip-flop operation."+      },+      {+        "number": "2",+        "name": "OE2",+        "type": "input",+        "description": "Active-low output enable 2; outputs go to high-impedance when either OE1 or OE2 is high, without affecting flip-flop operation."+      },+      {+        "number": "3",+        "name": "Q0",+        "type": "tri_state",+        "description": "Three-state buffered Q output of flip-flop 0, able to drive 15 LSTTL loads."+      },+      {+        "number": "4",+        "name": "Q1",+        "type": "tri_state",+        "description": "Three-state buffered Q output of flip-flop 1, able to drive 15 LSTTL loads."+      },+      {+        "number": "5",+        "name": "Q2",+        "type": "tri_state",+        "description": "Three-state buffered Q output of flip-flop 2, able to drive 15 LSTTL loads."+      },+      {+        "number": "6",+        "name": "Q3",+        "type": "tri_state",+        "description": "Three-state buffered Q output of flip-flop 3, able to drive 15 LSTTL loads."+      },+      {+        "number": "7",+        "name": "CP",+        "type": "input",+        "description": "Shared clock input; Q outputs change on the positive-going (low-to-high) clock edge."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground supply pin."+      },+      {+        "number": "9",+        "name": "E1",+        "type": "input",+        "description": "Data enable 1; when E1 or E2 is high, Q outputs are fed back and the flip-flops hold their state on the clock edge."+      },+      {+        "number": "10",+        "name": "E2",+        "type": "input",+        "description": "Data enable 2; when E1 or E2 is high, Q outputs are fed back and the flip-flops hold their state on the clock edge."+      },+      {+        "number": "11",+        "name": "D3",+        "type": "input",+        "description": "Data input to flip-flop 3, sampled on the rising clock edge."+      },+      {+        "number": "12",+        "name": "D2",+        "type": "input",+        "description": "Data input to flip-flop 2, sampled on the rising clock edge."+      },+      {+        "number": "13",+        "name": "D1",+        "type": "input",+        "description": "Data input to flip-flop 1, sampled on the rising clock edge."+      },+      {+        "number": "14",+        "name": "D0",+        "type": "input",+        "description": "Data input to flip-flop 0, sampled on the rising clock edge."+      },+      {+        "number": "15",+        "name": "MR",+        "type": "input",+        "description": "Master reset input; taking MR to logic high resets the flip-flops (Q low)."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply; 4.5 V to 5.5 V for HCT types, with a 0.1-µF bypass capacitor recommended close to the pin."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-sonnet-5-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 26,+        "cost_usd": 0.4759,+        "at": "2026-10-06T04:10:25"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/cd74hct173",+        "pages": 26,+        "sha256": "6ad3dbf1cefe1afb",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file