main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cd74hct14pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cd74hct14pwr: viewers · Ray
cd74hct14pwr-etched.fit.json cd74hct14pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74hct14pwr-etched.glb cd74hct14pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
cd74hct14pwr-etched.step cd74hct14pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
cd74hct14pwr.glb Publish 0.1.0 · Ray
cd74hct14pwr.kicad_mod Publish 0.1.0 · Ray
cd74hct14pwr.kicad_sym Publish 0.1.0 · Ray
cd74hct14pwr.lbr Publish 0.1.0 · Ray
cd74hct14pwr.step Publish 0.1.0 · Ray
package.json cd74hct14pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
page.json cd74hct14pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
README.md Initial commit: component/cd74hct14pwr · Ray

CD74HCT14PWR

Texas Instruments · Inverters · TSSOP-14

CD74HCT14PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input TTL-compatible Schmitt-trigger input for channel 1; accepts HIGH ≥2V and LOW ≤0.8V
2 1Y output Inverted output of channel 1; sources/sinks ±25mA and drives 10 LSTTL loads maximum
3 2A input TTL-compatible Schmitt-trigger input for channel 2; accepts HIGH ≥2V and LOW ≤0.8V
4 2Y output Inverted output of channel 2; sources/sinks ±25mA and drives 10 LSTTL loads maximum
5 3A input TTL-compatible Schmitt-trigger input for channel 3; accepts HIGH ≥2V and LOW ≤0.8V
6 3Y output Inverted output of channel 3; sources/sinks ±25mA and drives 10 LSTTL loads maximum
7 GND power_in Ground reference
8 4Y output Inverted output of channel 4; sources/sinks ±25mA and drives 10 LSTTL loads maximum
9 4A input TTL-compatible Schmitt-trigger input for channel 4; accepts HIGH ≥2V and LOW ≤0.8V
10 5Y output Inverted output of channel 5; sources/sinks ±25mA and drives 10 LSTTL loads maximum
11 5A input TTL-compatible Schmitt-trigger input for channel 5; accepts HIGH ≥2V and LOW ≤0.8V
12 6Y output Inverted output of channel 6; sources/sinks ±25mA and drives 10 LSTTL loads maximum
13 6A input TTL-compatible Schmitt-trigger input for channel 6; accepts HIGH ≥2V and LOW ≤0.8V
14 VCC power_in Positive supply voltage; 4.5V to 5.5V recommended operating range

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD74HCT14PWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd74hct14pwr-etched.step / cd74hct14pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hct14pwr.step / cd74hct14pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 b67c334f441b86f7, retrieved 2026-09-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF