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Generated by kicad-footprint-generator · KiCad file format 20260206

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cd74hct00m96-etched.step	cd74hct00m96: factory component page (tier=lcsc) · Ray	1d ago
cd74hct00m96-hero.glb	cd74hct00m96: hero GLB from the etched model (keeps the MPN mark) · Ray	1d ago
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README.md	Initial commit: component/cd74hct00m96 · Ray	1d ago

CD74HCT00M96

Texas Instruments · Logic Gates · SOIC-14

CD74HCT00M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Input channel 1, input A; TTL-compatible CMOS input that must not be left floating and must be tied to VCC or GND when unused.
2	1B	input	Input channel 1, input B; TTL-compatible CMOS input that must not be left floating and must be tied to VCC or GND when unused.
3	1Y	output	Output channel 1, output Y; balanced CMOS push-pull output that should not be connected directly to VCC or ground.
4	2A	input	Input channel 2, input A; TTL-compatible CMOS input that must not be left floating and must be tied to VCC or GND when unused.
5	2B	input	Input channel 2, input B; TTL-compatible CMOS input that must not be left floating and must be tied to VCC or GND when unused.
6	2Y	output	Output channel 2, output Y; balanced CMOS push-pull output that should not be connected directly to VCC or ground.
7	GND	power_in	Ground reference; must sink the total output current plus the maximum supply current ICC, and total current through GND must not exceed the absolute maximum rating.
8	3Y	output	Output channel 3, output Y; balanced CMOS push-pull output that should not be connected directly to VCC or ground.
9	3A	input	Input channel 3, input A; TTL-compatible CMOS input that must not be left floating and must be tied to VCC or GND when unused.
10	3B	input	Input channel 3, input B; TTL-compatible CMOS input that must not be left floating and must be tied to VCC or GND when unused.
11	4Y	output	Output channel 4, output Y; balanced CMOS push-pull output that should not be connected directly to VCC or ground.
12	4A	input	Input channel 4, input A; TTL-compatible CMOS input that must not be left floating and must be tied to VCC or GND when unused.
13	4B	input	Input channel 4, input B; TTL-compatible CMOS input that must not be left floating and must be tied to VCC or GND when unused.
14	VCC	power_in	Positive supply; recommended operating range is 4.5 V to 5.5 V, with a 0.1 µF bypass capacitor recommended close to the pin.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-14
Category	Logic
Pins	14

CAD (KiCad official)

Symbol: CD74HCT00M96
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)
3D model files: cd74hct00m96-etched.step / cd74hct00m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hct00m96.step / cd74hct00m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (25 pp, sha256 1a0630bdef3224da, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF