component

CD74HC86M96

Public Made by Adom

by adom

Texas Instruments Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icscd74hc86m96factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
cd74hc86m96 / README.md
History Download
Ray Publish 0.1.0 0a23bbb 2d ago

CD74HC86M96

Texas Instruments · Gates · SOIC-14

CD74HC86M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of channel 1 of the four 2-input XOR gates.
2 1B input Input B of channel 1 of the four 2-input XOR gates.
3 1Y output Output Y of channel 1 of the four 2-input XOR gates.
4 2A input Input A of channel 2 of the four 2-input XOR gates.
5 2B input Input B of channel 2 of the four 2-input XOR gates.
6 2Y output Output Y of channel 2 of the four 2-input XOR gates.
7 GND power_in Ground reference for the device.
8 3Y output Output Y of channel 3 of the four 2-input XOR gates.
9 3A input Input A of channel 3 of the four 2-input XOR gates.
10 3B input Input B of channel 3 of the four 2-input XOR gates.
11 4Y output Output Y of channel 4 of the four 2-input XOR gates.
12 4A input Input A of channel 4 of the four 2-input XOR gates.
13 4B input Input B of channel 4 of the four 2-input XOR gates.
14 VCC power_in Positive supply; recommended operating range is 2 V to 6 V (VCC supply voltage, page 4).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (absolute maximum) VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamp current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Continuous output current IO -25 25 mA VO > -0.5 V or VO < VCC + 0.5 V 4
Continuous current through VCC or GND -50 50 mA 4
Junction temperature TJ 150 °C 4
Lead temperature (soldering) 300 °C 10 s; SOIC lead tips only 4
Storage temperature Tstg -65 150 °C 4
ESD Human-body model V(ESD) -1000 1000 V HBM, per ANSI/ESDA/JEDEC JS-001 4
ESD Charged-device model V(ESD) -1000 1000 V CDM, per JEDEC JESD22-C101 4
Supply voltage (recommended) VCC 2 5 6 V 4
High-level input voltage VIH 1.5 V VCC = 2 V 4
High-level input voltage VIH 3.15 V VCC = 4.5 V 4
High-level input voltage VIH 4.2 V VCC = 6 V 4
Low-level input voltage VIL 0.5 V VCC = 2 V 4
Low-level input voltage VIL 1.35 V VCC = 4.5 V 4
Low-level input voltage VIL 1.8 V VCC = 6 V 4
Input voltage VI 0 V max = VCC 4
Output voltage VO 0 V max = VCC 4
Input transition time tt 1000 ns VCC = 2 V 4
Input transition time tt 500 ns VCC = 4.5 V 4
Input transition time tt 400 ns VCC = 6 V 4
Operating free-air temperature TA -55 125 °C 4
Junction-to-ambient thermal resistance RθJA 133.6 °C/W D (SOIC) 14 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 89 °C/W D (SOIC) 14 pins 5
Junction-to-board thermal resistance RθJB 89.5 °C/W D (SOIC) 14 pins 5
Junction-to-top characterization parameter ΨJT 45.5 °C/W D (SOIC) 14 pins 5
Junction-to-board characterization parameter ΨJB 89.1 °C/W D (SOIC) 14 pins 5
High-level output voltage VOH 1.9 V VI = VIH or VIL; IOH = -20 µA; VCC = 2 V; TA = -55°C to 125°C 5
High-level output voltage VOH 4.4 V VI = VIH or VIL; IOH = -20 µA; VCC = 4.5 V; TA = -55°C to 125°C 5
High-level output voltage VOH 5.9 V VI = VIH or VIL; IOH = -20 µA; VCC = 6 V; TA = -55°C to 125°C 5
High-level output voltage VOH 3.7 V VI = VIH or VIL; IOH = -4 mA; VCC = 4.5 V; TA = -55°C to 125°C 5
High-level output voltage VOH 5.2 V VI = VIH or VIL; IOH = -5.2 mA; VCC = 6 V; TA = -55°C to 125°C 5
Low-level output voltage VOL 0.1 V VI = VIH or VIL; IOL = 20 µA; VCC = 2 V; TA = -55°C to 125°C 5
Low-level output voltage VOL 0.4 V VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V; TA = -55°C to 125°C 5
Input leakage current II -1 1 µA VI = VCC or 0; VCC = 6 V; TA = -55°C to 125°C 5
Supply current ICC 2 40 µA VI = VCC or 0; IO = 0; VCC = 6 V; TA = -55°C to 125°C (typ at 25°C) 5
Input capacitance Ci 10 pF VCC = 5 V 5
Propagation delay A or B to Y tpd 180 ns CL = 50 pF; VCC = 2 V; TA = -55°C to 125°C 5
Propagation delay A or B to Y tpd 36 ns CL = 50 pF; VCC = 4.5 V; TA = -55°C to 125°C 5
Propagation delay A or B to Y tpd 31 ns CL = 50 pF; VCC = 6 V; TA = -55°C to 125°C 5
Transition time Y tt 110 ns CL = 50 pF; VCC = 2 V; TA = -55°C to 125°C 6
Transition time Y tt 22 ns CL = 50 pF; VCC = 4.5 V; TA = -55°C to 125°C 6
Transition time Y tt 19 ns CL = 50 pF; VCC = 6 V; TA = -55°C to 125°C 6
Power dissipation capacitance per gate Cpd 22 pF No load; VCC = 2 V to 6 V 6

CAD (KiCad official)

  • Symbol: CD74HC86M96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd74hc86m96-etched.step / cd74hc86m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc86m96.step / cd74hc86m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 2437a2107bbedb31, retrieved 2026-10-29, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF