component
CD74HC74M96
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+51@@ -0,0 +1,51 @@+# CD74HC74M96++**Texas Instruments** · Flip Flops · SOIC-14++CD74HC74M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1CLR | input | Active-low asynchronous clear input for channel 1; valid input voltage 0 to VCC. |+| 2 | 1D | input | Data input for channel 1; valid input voltage 0 to VCC. |+| 3 | 1CLK | input | Positive-edge-triggered clock input for channel 1; valid input voltage 0 to VCC, maximum frequency 4 to 35 MHz depending on VCC. |+| 4 | 1PRE | input | Active-low asynchronous preset input for channel 1; valid input voltage 0 to VCC. |+| 5 | 1Q | output | Non-inverted output for channel 1; output voltage range 0 to VCC. |+| 6 | 1Q | output | Inverted output for channel 1; output voltage range 0 to VCC. |+| 7 | GND | power_in | Ground reference; continuous current ±50 mA. |+| 8 | 2Q | output | Inverted output for channel 2; output voltage range 0 to VCC. |+| 9 | 2Q | output | Non-inverted output for channel 2; output voltage range 0 to VCC. |+| 10 | 2PRE | input | Active-low asynchronous preset input for channel 2; valid input voltage 0 to VCC. |+| 11 | 2CLK | input | Positive-edge-triggered clock input for channel 2; valid input voltage 0 to VCC, maximum frequency 4 to 35 MHz depending on VCC. |+| 12 | 2D | input | Data input for channel 2; valid input voltage 0 to VCC. |+| 13 | 2CLR | input | Active-low asynchronous clear input for channel 2; valid input voltage 0 to VCC. |+| 14 | VCC | power_in | Positive supply voltage; 2 V to 6 V operating range, continuous current ±50 mA. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `CD74HC74M96`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)+- 3D model files: `cd74hc74m96-etched.step` / `cd74hc74m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hc74m96.step` / `cd74hc74m96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hc74) (29 pp, sha256 `f9976f07eaadf7ba`, retrieved 2026-09-26, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hc74m96-datasheet.pdf)
page.jsonadded+192@@ -0,0 +1,192 @@+{+ "slug": "cd74hc74m96",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd74hc74m96",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd74hc74m96.kicad_sym",+ "cd74hc74m96.kicad_mod",+ "cd74hc74m96.glb",+ "cd74hc74m96.step",+ "cd74hc74m96.lbr",+ "docs/hero.png",+ "docs/cd74hc74m96-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD74HC74M96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hc74",+ "parts": {+ "symbol": "cd74hc74m96.kicad_sym",+ "footprint": "cd74hc74m96.kicad_mod",+ "model_3d": "cd74hc74m96-etched.glb",+ "model_3d_plain": "cd74hc74m96.glb",+ "model_3d_step": "cd74hc74m96-etched.step",+ "model_3d_step_plain": "cd74hc74m96.step",+ "lbr": "cd74hc74m96.lbr"+ },+ "distributor_links": {+ "lcsc": "C484719",+ "digikey": "296-14541-2-ND",+ "mouser": "595-CD74HC74M96"+ },+ "distributor_check": {+ "checked_at": "2026-09-26T15:17:04Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-14541-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-CD74HC74M96",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "1CLR",+ "type": "input",+ "description": "Active-low asynchronous clear input for channel 1; valid input voltage 0 to VCC."+ },+ {+ "number": "2",+ "name": "1D",+ "type": "input",+ "description": "Data input for channel 1; valid input voltage 0 to VCC."+ },+ {+ "number": "3",+ "name": "1CLK",+ "type": "input",+ "description": "Positive-edge-triggered clock input for channel 1; valid input voltage 0 to VCC, maximum frequency 4 to 35 MHz depending on VCC."+ },+ {+ "number": "4",+ "name": "1PRE",+ "type": "input",+ "description": "Active-low asynchronous preset input for channel 1; valid input voltage 0 to VCC."+ },+ {+ "number": "5",+ "name": "1Q",+ "type": "output",+ "description": "Non-inverted output for channel 1; output voltage range 0 to VCC."+ },+ {+ "number": "6",+ "name": "1Q",+ "type": "output",+ "description": "Inverted output for channel 1; output voltage range 0 to VCC."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference; continuous current ±50 mA."+ },+ {+ "number": "8",+ "name": "2Q",+ "type": "output",+ "description": "Inverted output for channel 2; output voltage range 0 to VCC."+ },+ {+ "number": "9",+ "name": "2Q",+ "type": "output",+ "description": "Non-inverted output for channel 2; output voltage range 0 to VCC."+ },+ {+ "number": "10",+ "name": "2PRE",+ "type": "input",+ "description": "Active-low asynchronous preset input for channel 2; valid input voltage 0 to VCC."+ },+ {+ "number": "11",+ "name": "2CLK",+ "type": "input",+ "description": "Positive-edge-triggered clock input for channel 2; valid input voltage 0 to VCC, maximum frequency 4 to 35 MHz depending on VCC."+ },+ {+ "number": "12",+ "name": "2D",+ "type": "input",+ "description": "Data input for channel 2; valid input voltage 0 to VCC."+ },+ {+ "number": "13",+ "name": "2CLR",+ "type": "input",+ "description": "Active-low asynchronous clear input for channel 2; valid input voltage 0 to VCC."+ },+ {+ "number": "14",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage; 2 V to 6 V operating range, continuous current ±50 mA."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 29,+ "cost_usd": 0.2361,+ "at": "2026-09-26T15:16:47"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd74hc74",+ "pages": 29,+ "sha256": "f9976f07eaadf7ba",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}