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CD74HC574M

Texas Instruments · Flip Flops · SOIC-20-300mil

CD74HC574M from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low output enable; when HIGH the Q outputs are in the high-impedance state, independent of register operation.
2 D0 input Data input 0, latched into the flip-flop on the LOW-to-HIGH transition of CP.
3 D1 input Data input 1, latched into the flip-flop on the LOW-to-HIGH transition of CP.
4 D2 input Data input 2, latched into the flip-flop on the LOW-to-HIGH transition of CP.
5 D3 input Data input 3, latched into the flip-flop on the LOW-to-HIGH transition of CP.
6 D4 input Data input 4, latched into the flip-flop on the LOW-to-HIGH transition of CP.
7 D5 input Data input 5, latched into the flip-flop on the LOW-to-HIGH transition of CP.
8 D6 input Data input 6, latched into the flip-flop on the LOW-to-HIGH transition of CP.
9 D7 input Data input 7, latched into the flip-flop on the LOW-to-HIGH transition of CP.
10 GND power_in Ground reference pin.
11 CP input Clock input; data is entered into the registers on the LOW-to-HIGH transition.
12 Q7 tri_state 3-state output 7 of the flip-flop, high-impedance when OE is HIGH, able to drive 15 LSTTL loads.
13 Q6 tri_state 3-state output 6 of the flip-flop, high-impedance when OE is HIGH, able to drive 15 LSTTL loads.
14 Q5 tri_state 3-state output 5 of the flip-flop, high-impedance when OE is HIGH, able to drive 15 LSTTL loads.
15 Q4 tri_state 3-state output 4 of the flip-flop, high-impedance when OE is HIGH, able to drive 15 LSTTL loads.
16 Q3 tri_state 3-state output 3 of the flip-flop, high-impedance when OE is HIGH, able to drive 15 LSTTL loads.
17 Q2 tri_state 3-state output 2 of the flip-flop, high-impedance when OE is HIGH, able to drive 15 LSTTL loads.
18 Q1 tri_state 3-state output 1 of the flip-flop, high-impedance when OE is HIGH, able to drive 15 LSTTL loads.
19 Q0 tri_state 3-state output 0 of the flip-flop, high-impedance when OE is HIGH, able to drive 15 LSTTL loads.
20 VCC power_in Supply voltage, 2 V to 6 V for HC types, with a 0.1-uF bypass capacitor recommended close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: CD74HC574M
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: cd74hc574m-etched.step / cd74hc574m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc574m.step / cd74hc574m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 9958d4197189930d, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF