component
CD74HC4520M96
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74HC4520M96
Texas Instruments · Counters, Dividers · SOIC-16
CD74HC4520M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CP | input | Counter 1 clock input, increments counter on positive-going or negative-going edge transitions when enabled. |
| 2 | 1E | input | Counter 1 enable input, logic high enables counter increment on clock transitions, logic low disables. |
| 3 | 1Q0 | output | Counter 1 output bit 0 (least significant bit), resets to logic low when 1MR is high. |
| 4 | 1Q1 | output | Counter 1 output bit 1, resets to logic low when 1MR is high. |
| 5 | 1Q2 | output | Counter 1 output bit 2, resets to logic low when 1MR is high. |
| 6 | 1Q3 | output | Counter 1 output bit 3 (most significant bit), resets to logic low when 1MR is high. |
| 7 | 1MR | input | Counter 1 master reset input, high level forces all counter outputs Q0-Q3 to logic low. |
| 8 | GND | power_in | Ground, 0V power supply reference. |
| 9 | 2CP | input | Counter 2 clock input, increments counter on positive-going or negative-going edge transitions when enabled. |
| 10 | 2E | input | Counter 2 enable input, logic high enables counter increment on clock transitions, logic low disables. |
| 11 | 2Q0 | output | Counter 2 output bit 0 (least significant bit), resets to logic low when 2MR is high. |
| 12 | 2Q1 | output | Counter 2 output bit 1, resets to logic low when 2MR is high. |
| 13 | 2Q2 | output | Counter 2 output bit 2, resets to logic low when 2MR is high. |
| 14 | 2Q3 | output | Counter 2 output bit 3 (most significant bit), resets to logic low when 2MR is high. |
| 15 | 2MR | input | Counter 2 master reset input, high level forces all counter outputs Q0-Q3 to logic low. |
| 16 | VCC | power_in | Power supply input, positive voltage 2V to 6V for HC types, 4.5V to 5.5V for HCT types. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD74HC4520M96 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd74hc4520m96-etched.step/cd74hc4520m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hc4520m96.step/cd74hc4520m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
2f94d1df506d1a7b, retrieved 2026-10-01, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).