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CD74HC4520M
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CD74HC4520M++**Texas Instruments** · Counters, Dividers · SOIC-16++CD74HC4520M from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1CP | input | Counter 1 clock input, which increments the counter on the high-to-low transition when 1E is high (CP and E are interchangeable for edge selection). |+| 2 | 1E | input | Counter 1 enable input, which increments the counter on a low-to-high transition while 1CP is low. |+| 3 | 1Q0 | output | Counter 1 output Q0, the least significant bit, which drives 10 LSTTL loads (standard output). |+| 4 | 1Q1 | output | Counter 1 output Q1, which drives 10 LSTTL loads (standard output). |+| 5 | 1Q2 | output | Counter 1 output Q2, which drives 10 LSTTL loads (standard output). |+| 6 | 1Q3 | output | Counter 1 output Q3, the most significant bit, which can connect to the next counter's ENABLE input for ripple cascading while that counter's CLOCK is held low. |+| 7 | 1MR | input | Counter 1 master reset input, where a high level clears Q0 through Q3 to low. |+| 8 | GND | power_in | Ground (0 V) supply pin. |+| 9 | 2CP | input | Counter 2 clock input, which increments the counter on the high-to-low transition when 2E is high. |+| 10 | 2E | input | Counter 2 enable input, which increments the counter on a low-to-high transition while 2CP is low. |+| 11 | 2Q0 | output | Counter 2 output Q0, the least significant bit, which drives 10 LSTTL loads (standard output). |+| 12 | 2Q1 | output | Counter 2 output Q1, which drives 10 LSTTL loads (standard output). |+| 13 | 2Q2 | output | Counter 2 output Q2, which drives 10 LSTTL loads (standard output). |+| 14 | 2Q3 | output | Counter 2 output Q3, the most significant bit, which drives 10 LSTTL loads (standard output). |+| 15 | 2MR | input | Counter 2 master reset input, where a high level clears Q0 through Q3 to low. |+| 16 | VCC | power_in | Positive supply pin, 2V to 6V for HC types (absolute maximum -0.5V to 7V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74HC4520M`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd74hc4520m-etched.step` / `cd74hc4520m-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hc4520m.step` / `cd74hc4520m.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hc4520) (16 pp, sha256 `2f94d1df506d1a7b`, retrieved 2026-10-06, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hc4520m-datasheet.pdf)
page.jsonadded+207@@ -0,0 +1,207 @@+{+ "slug": "cd74hc4520m",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd74hc4520m",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd74hc4520m.kicad_sym",+ "cd74hc4520m.kicad_mod",+ "cd74hc4520m.glb",+ "cd74hc4520m.step",+ "cd74hc4520m.lbr",+ "docs/hero.png",+ "docs/cd74hc4520m-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cd74hc4520m-hero.glb",+ "cd74hc4520m-hero.overlay.json"+ ],+ "component": {+ "mpn": "CD74HC4520M",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Counters, Dividers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hc4520",+ "parts": {+ "symbol": "cd74hc4520m.kicad_sym",+ "footprint": "cd74hc4520m.kicad_mod",+ "model_3d": "cd74hc4520m-hero.glb",+ "model_3d_plain": "cd74hc4520m.glb",+ "model_3d_step": "cd74hc4520m-etched.step",+ "model_3d_step_plain": "cd74hc4520m.step",+ "lbr": "cd74hc4520m.lbr"+ },+ "distributor_links": {+ "lcsc": 1547947,+ "digikey": "2156-CD74HC4520M-ND",+ "mouser": "595-CD74HC4520M"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T00:44:45Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "2156-CD74HC4520M-ND",+ "status": "found",+ "lifecycle": "Obsolete"+ },+ "mouser": {+ "pn": "595-CD74HC4520M",+ "status": "found",+ "lifecycle": "Obsolete"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "1CP",+ "type": "input",+ "description": "Counter 1 clock input, which increments the counter on the high-to-low transition when 1E is high (CP and E are interchangeable for edge selection)."+ },+ {+ "number": "2",+ "name": "1E",+ "type": "input",+ "description": "Counter 1 enable input, which increments the counter on a low-to-high transition while 1CP is low."+ },+ {+ "number": "3",+ "name": "1Q0",+ "type": "output",+ "description": "Counter 1 output Q0, the least significant bit, which drives 10 LSTTL loads (standard output)."+ },+ {+ "number": "4",+ "name": "1Q1",+ "type": "output",+ "description": "Counter 1 output Q1, which drives 10 LSTTL loads (standard output)."+ },+ {+ "number": "5",+ "name": "1Q2",+ "type": "output",+ "description": "Counter 1 output Q2, which drives 10 LSTTL loads (standard output)."+ },+ {+ "number": "6",+ "name": "1Q3",+ "type": "output",+ "description": "Counter 1 output Q3, the most significant bit, which can connect to the next counter's ENABLE input for ripple cascading while that counter's CLOCK is held low."+ },+ {+ "number": "7",+ "name": "1MR",+ "type": "input",+ "description": "Counter 1 master reset input, where a high level clears Q0 through Q3 to low."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground (0 V) supply pin."+ },+ {+ "number": "9",+ "name": "2CP",+ "type": "input",+ "description": "Counter 2 clock input, which increments the counter on the high-to-low transition when 2E is high."+ },+ {+ "number": "10",+ "name": "2E",+ "type": "input",+ "description": "Counter 2 enable input, which increments the counter on a low-to-high transition while 2CP is low."+ },+ {+ "number": "11",+ "name": "2Q0",+ "type": "output",+ "description": "Counter 2 output Q0, the least significant bit, which drives 10 LSTTL loads (standard output)."+ },+ {+ "number": "12",+ "name": "2Q1",+ "type": "output",+ "description": "Counter 2 output Q1, which drives 10 LSTTL loads (standard output)."+ },+ {+ "number": "13",+ "name": "2Q2",+ "type": "output",+ "description": "Counter 2 output Q2, which drives 10 LSTTL loads (standard output)."+ },+ {+ "number": "14",+ "name": "2Q3",+ "type": "output",+ "description": "Counter 2 output Q3, the most significant bit, which drives 10 LSTTL loads (standard output)."+ },+ {+ "number": "15",+ "name": "2MR",+ "type": "input",+ "description": "Counter 2 master reset input, where a high level clears Q0 through Q3 to low."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply pin, 2V to 6V for HC types (absolute maximum -0.5V to 7V)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 16,+ "cost_usd": 0.1296,+ "at": "2026-10-06T00:44:29"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd74hc4520",+ "pages": 16,+ "sha256": "2f94d1df506d1a7b",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}