component

CD74HC4520M

Public Made by Adom

by adom

Texas Instruments Counters, Dividers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogiccd74hc4520mfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

CD74HC4520M

Texas Instruments · Counters, Dividers · SOIC-16

CD74HC4520M from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CP input Counter 1 clock input, which increments the counter on the high-to-low transition when 1E is high (CP and E are interchangeable for edge selection).
2 1E input Counter 1 enable input, which increments the counter on a low-to-high transition while 1CP is low.
3 1Q0 output Counter 1 output Q0, the least significant bit, which drives 10 LSTTL loads (standard output).
4 1Q1 output Counter 1 output Q1, which drives 10 LSTTL loads (standard output).
5 1Q2 output Counter 1 output Q2, which drives 10 LSTTL loads (standard output).
6 1Q3 output Counter 1 output Q3, the most significant bit, which can connect to the next counter's ENABLE input for ripple cascading while that counter's CLOCK is held low.
7 1MR input Counter 1 master reset input, where a high level clears Q0 through Q3 to low.
8 GND power_in Ground (0 V) supply pin.
9 2CP input Counter 2 clock input, which increments the counter on the high-to-low transition when 2E is high.
10 2E input Counter 2 enable input, which increments the counter on a low-to-high transition while 2CP is low.
11 2Q0 output Counter 2 output Q0, the least significant bit, which drives 10 LSTTL loads (standard output).
12 2Q1 output Counter 2 output Q1, which drives 10 LSTTL loads (standard output).
13 2Q2 output Counter 2 output Q2, which drives 10 LSTTL loads (standard output).
14 2Q3 output Counter 2 output Q3, the most significant bit, which drives 10 LSTTL loads (standard output).
15 2MR input Counter 2 master reset input, where a high level clears Q0 through Q3 to low.
16 VCC power_in Positive supply pin, 2V to 6V for HC types (absolute maximum -0.5V to 7V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD74HC4520M
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc4520m-etched.step / cd74hc4520m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc4520m.step / cd74hc4520m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (16 pp, sha256 2f94d1df506d1a7b, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF