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CD74HC4094PWR

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Texas Instruments Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CD74HC4094PWR

Texas Instruments · Shift Registers · TSSOP-16

CD74HC4094PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 STROBE input Strobe input that transfers data from each shift register stage to the storage register when high.
2 DATA input Serial data input to the first stage of the shift register.
3 CP input Clock input; data is shifted on positive clock transitions.
4 Q0 tri_state Parallel three-state storage register output 0 that appears when Output-Enable is high.
5 Q1 tri_state Parallel three-state storage register output 1 that appears when Output-Enable is high.
6 Q2 tri_state Parallel three-state storage register output 2 that appears when Output-Enable is high.
7 Q3 tri_state Parallel three-state storage register output 3 that appears when Output-Enable is high.
8 GND power_in Ground reference pin.
9 QS1 output Serial output that provides data on positive clock edges for cascading in systems with fast clock rise time.
10 QS2 output Serial output that provides data on the next negative clock edge for cascading when clock rise time is slow.
11 Q7 tri_state Parallel three-state storage register output 7 that appears when Output-Enable is high.
12 Q6 tri_state Parallel three-state storage register output 6 that appears when Output-Enable is high.
13 Q5 tri_state Parallel three-state storage register output 5 that appears when Output-Enable is high.
14 Q4 tri_state Parallel three-state storage register output 4 that appears when Output-Enable is high.
15 OE input Output-Enable input; storage register data appears at the parallel outputs when high, and outputs are high-impedance when low.
16 VCC power_in Supply voltage pin, 2 V to 6 V for HC types, with a 0.1-µF bypass capacitor recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input diode current IIK -20 20 mA For VI < -0.5 V or VI > VCC + 0.5 V 4
Output diode current IOK -20 20 mA For VO < -0.5 V or VO > VCC + 0.5 V 4
Output source or sink current per output pin IO -25 25 mA For VO > -0.5 V or VO < VCC + 0.5 V 4
Continuous current through VCC or GND -50 50 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Maximum lead temperature 300 °C Soldering 10 s (SOIC - lead tips only) 4
Supply voltage range HC types VCC 2 6 V HC types 4
Input or output voltage VI, VO 0 V Maximum is VCC 4
Input rise and fall time tt 1000 ns VCC = 2 V 4
Input rise and fall time tt 500 ns VCC = 4.5 V 4
Input rise and fall time tt 400 ns VCC = 6 V 4
Temperature range TA -55 125 °C Operating free-air temperature 4
High-level input voltage VIH 1.5 V HC types, VCC = 2 V 5
High-level input voltage VIH 3.15 V HC types, VCC = 4.5 V 5
High-level input voltage VIH 4.2 V HC types, VCC = 6 V 5
Low-level input voltage VIL 0.5 V HC types, VCC = 2 V 5
Low-level input voltage VIL 1.35 V HC types, VCC = 4.5 V 5
Low-level input voltage VIL 1.8 V HC types, VCC = 6 V 5
High-level output voltage CMOS loads VOH 1.9 V IOH = -20 µA, VCC = 2 V 5
High-level output voltage CMOS loads VOH 4.4 V IOH = -20 µA, VCC = 4.5 V 5
High-level output voltage CMOS loads VOH 5.9 V IOH = -20 µA, VCC = 6 V 5
High-level output voltage TTL loads VOH 3.7 V IOH = -6 mA, VCC = 4.5 V, TA = -55 to 125 °C 5
High-level output voltage TTL loads VOH 5.2 V IOH = -7.8 mA, VCC = 6 V, TA = -55 to 125 °C 5
Low-level output voltage CMOS loads VOL 0.1 V IOL = 20 µA, VCC = 2 V 5
Low-level output voltage TTL loads VOL 0.4 V IOL = 6 mA, VCC = 4.5 V, TA = -55 to 125 °C 5
Input leakage current II -1 0.1 1 µA VI = VCC or GND, VCC = 6 V 5
Supply current ICC 8 160 µA VI = VCC or GND, VCC = 6 V, TA = -55 to 125 °C 5
CP pulse duration tW 120 ns VCC = 2 V, TA = -55 to 125 °C 6
CP pulse duration tW 24 ns VCC = 4.5 V, TA = -55 to 125 °C 6
CP pulse duration tW 20 ns VCC = 6 V, TA = -55 to 125 °C 6
Data set-up time tSU 75 ns VCC = 2 V, TA = -55 to 125 °C 6
Data set-up time tSU 15 ns VCC = 4.5 V, TA = -55 to 125 °C 6
Data set-up time tSU 13 ns VCC = 6 V, TA = -55 to 125 °C 6
STR set-up time tSU 150 ns VCC = 2 V, TA = -55 to 125 °C 6
STR set-up time tSU 30 ns VCC = 4.5 V, TA = -55 to 125 °C 6
STR set-up time tSU 26 ns VCC = 6 V, TA = -55 to 125 °C 6
Maximum CP frequency fCL (MAX) 4 MHz VCC = 2 V, TA = -55 to 125 °C 6
Maximum CP frequency fCL (MAX) 20 MHz VCC = 4.5 V, TA = -55 to 125 °C 6
Maximum CP frequency fCL (MAX) 24 MHz VCC = 6 V, TA = -55 to 125 °C 6
Propagation delay time CP to QS1 tpd 225 ns VCC = 2 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time CP to QS1 tpd 45 ns VCC = 4.5 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time CP to QS1 tpd 38 ns VCC = 6 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time CP to QS2 tpd 205 ns VCC = 2 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time CP to QS2 tpd 41 ns VCC = 4.5 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time CP to QS2 tpd 35 ns VCC = 6 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time CP to Qn tpd 295 ns VCC = 2 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time CP to Qn tpd 59 ns VCC = 4.5 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time CP to Qn tpd 50 ns VCC = 6 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time STR to Qn tt 270 ns VCC = 2 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time STR to Qn tt 54 ns VCC = 4.5 V, CL = 50 pF, TA = -55 to 125 °C 7
Propagation delay time STR to Qn tt 46 ns VCC = 6 V, CL = 50 pF, TA = -55 to 125 °C 7
Output enable to Qn tPZH, tPZL 265 ns VCC = 2 V, CL = 50 pF, TA = -55 to 125 °C 7
Output enable to Qn tPZH, tPZL 53 ns VCC = 4.5 V, CL = 50 pF, TA = -55 to 125 °C 7
Output enable to Qn tPZH, tPZL 45 ns VCC = 6 V, CL = 50 pF, TA = -55 to 125 °C 7
Thermal resistance junction-to-ambient PW (TSSOP) RθJA 108 °C/W Junction-to-ambient, PW package 4

CAD (KiCad official)

  • Symbol: CD74HC4094PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc4094pwr-etched.step / cd74hc4094pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc4094pwr.step / cd74hc4094pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 c97221138df38515, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF