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CD74HC4060PWR

Public Made by Adom

by adom

Texas Instruments Counters / Dividers, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cd74hc4060pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cd74hc4060pwr-etched.fit.json cd74hc4060pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74hc4060pwr-etched.glb cd74hc4060pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
cd74hc4060pwr-etched.step cd74hc4060pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
cd74hc4060pwr.glb Publish 0.1.0 · Ray
cd74hc4060pwr.kicad_mod Publish 0.1.0 · Ray
cd74hc4060pwr.kicad_sym Publish 0.1.0 · Ray
cd74hc4060pwr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cd74hc4060pwr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json cd74hc4060pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
README.md cd74hc4060pwr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CD74HC4060PWR

Texas Instruments · Counters / Dividers · TSSOP-16

CD74HC4060PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q12 output Counter stage 12 output. CMOS output driving 10 LSTTL loads; VOH ≥ 4.4V at VCC=4.5V (CMOS load).
2 Q13 output Counter stage 13 output. Buffered CMOS output.
3 Q14 output Counter stage 14 output (final stage). Buffered CMOS output.
4 Q6 output Counter stage 6 output. Buffered CMOS output.
5 Q5 output Counter stage 5 output. Buffered CMOS output.
6 Q7 output Counter stage 7 output. Buffered CMOS output.
7 Q4 output Counter stage 4 output. Bus driver output (fanout 15 LSTTL loads).
8 GND power_in Ground reference (0V).
9 phiO output Oscillator output (φO). Buffered output of the internal oscillator; used with external R/C or crystal network to close the oscillator loop.
10 ~phiO output Inverted oscillator output (φO-bar). Complement of pin 9; used with the external oscillator network.
11 phiI input Oscillator/clock input (φI) with Schmitt-trigger action. Counter advances on the negative (falling) transition. When used with an external oscillator network the internal oscillator is closed through this pin.
12 MR input Master Reset (active HIGH). A high level asynchronously resets all 14 counter stages to 0 and disables the oscillator. HC has CMOS input levels; HCT has TTL input levels (VIH ≥ 2V, VIL ≤ 0.8V).
13 Q9 output Counter stage 9 output. Buffered CMOS output.
14 Q8 output Counter stage 8 output. Buffered CMOS output.
15 Q10 output Counter stage 10 output. Buffered CMOS output.
16 VCC power_in Positive supply. HC: 2V to 6V. HCT: 4.5V to 5.5V. Absolute max 7V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • CD74HC4060PWR
  • CD74HC4060PWRPWT
  • CD74HC4060PWRE
  • CD74HC4060PWRM
  • CD74HC4060PWRMT
  • CD74HC4060PWRM96
  • CD74HC4060PWRF3A

CAD (KiCad official)

  • Symbol: CD74HC4060PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc4060pwr-etched.step / cd74hc4060pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc4060pwr.step / cd74hc4060pwr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cd74hc4060pwr.step 205 KB You want the bare part, or you mark your own boards.
cd74hc4060pwr-etched.step 2.9 MB You want the part with CD74HC4060PWR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 720 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (21 pp, sha256 5ad438a2199a47fd, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF