CD74HC4060PWR

@@ -70,11 +70,23 @@   <smd name="14" x="2.8625" y="0.9750" dx="1.4750" dy="0.4000" layer="1"/>   <smd name="15" x="2.8625" y="1.6250" dx="1.4750" dy="0.4000" layer="1"/>   <smd name="16" x="2.8625" y="2.2750" dx="1.4750" dy="0.4000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-3.8600" y="2.2800"/>+    <vertex x="-4.1900" y="2.0400"/>+    <vertex x="-4.1900" y="2.5200"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-1.2000" y="2.5000"/>+    <vertex x="2.2000" y="2.5000"/>+    <vertex x="2.2000" y="-2.5000"/>+    <vertex x="-2.2000" y="-2.5000"/>+    <vertex x="-2.2000" y="1.5000"/>+  </polygon>   <wire x1="-2.3100" y1="2.7350" x2="2.3100" y2="2.7350" width="0.1200" layer="21"/>   <wire x1="2.3100" y1="-2.7350" x2="-2.3100" y2="-2.7350" width="0.1200" layer="21"/>   <text x="0" y="3.613" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.613" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-3.8600" y="2.2800"/><vertex x="-4.1900" y="2.0400"/><vertex x="-4.1900" y="2.5200"/></polygon></package>+</package> </packages> <symbols> <symbol name="CD74HC4060PWR">@@ -98,8 +110,8 @@   <pin name="Q9" x="17.78" y="0" length="middle" direction="out" rot="R180"/>   <pin name="MR" x="17.78" y="-2.54" length="middle" direction="in" rot="R180"/>   <pin name="phiI" x="17.78" y="-5.08" length="middle" direction="in" rot="R180"/>-  <pin name="~phiO" x="17.78" y="-7.62" length="middle" direction="out" rot="R180"/>-  <pin name="phiO" x="17.78" y="-10.16" length="middle" direction="out" rot="R180"/>+  <pin name="phiO" x="17.78" y="-7.62" length="middle" direction="out" rot="R180"/>+  <pin name="phiO@2" x="17.78" y="-10.16" length="middle" direction="out" rot="R180"/> </symbol> </symbols> <devicesets>@@ -125,10 +137,18 @@         <connect gate="G$1" pin="Q9" pad="13"/>         <connect gate="G$1" pin="MR" pad="12"/>         <connect gate="G$1" pin="phiI" pad="11"/>-        <connect gate="G$1" pin="~phiO" pad="10"/>-        <connect gate="G$1" pin="phiO" pad="9"/>+        <connect gate="G$1" pin="phiO" pad="10"/>+        <connect gate="G$1" pin="phiO@2" pad="9"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="CD74HC4060PWR" constant="no"/>+          <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+          <attribute name="MOUSER_PN" value="595-CD74HC4060PWR" constant="no"/>+          <attribute name="DIGIKEY_PN" value="296-31594-2-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C354054" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>

@@ -26,13 +26,17 @@       "model_3d_step": "cd74hc4060pwr.step",       "lbr": "cd74hc4060pwr.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "digikey": "296-31594-2-ND",+      "mouser": "595-CD74HC4060PWR",+      "lcsc": "C354054"+    },     "pins": [       {         "number": "1",         "name": "Q12",         "type": "output",-        "description": "Counter stage 12 output. CMOS output driving 10 LSTTL loads; VOH ≥ 4.4V at VCC=4.5V (CMOS load)."+        "description": "Counter stage 12 output. CMOS output driving 10 LSTTL loads; VOH \u2265 4.4V at VCC=4.5V (CMOS load)."       },       {         "number": "2",@@ -80,25 +84,25 @@         "number": "9",         "name": "phiO",         "type": "output",-        "description": "Oscillator output (φO). Buffered output of the internal oscillator; used with external R/C or crystal network to close the oscillator loop."+        "description": "Oscillator output (\u03c6O). Buffered output of the internal oscillator; used with external R/C or crystal network to close the oscillator loop."       },       {         "number": "10",         "name": "~phiO",         "type": "output",-        "description": "Inverted oscillator output (φO-bar). Complement of pin 9; used with the external oscillator network."+        "description": "Inverted oscillator output (\u03c6O-bar). Complement of pin 9; used with the external oscillator network."       },       {         "number": "11",         "name": "phiI",         "type": "input",-        "description": "Oscillator/clock input (φI) with Schmitt-trigger action. Counter advances on the negative (falling) transition. When used with an external oscillator network the internal oscillator is closed through this pin."+        "description": "Oscillator/clock input (\u03c6I) with Schmitt-trigger action. Counter advances on the negative (falling) transition. When used with an external oscillator network the internal oscillator is closed through this pin."       },       {         "number": "12",         "name": "MR",         "type": "input",-        "description": "Master Reset (active HIGH). A high level asynchronously resets all 14 counter stages to 0 and disables the oscillator. HC has CMOS input levels; HCT has TTL input levels (VIH ≥ 2V, VIL ≤ 0.8V)."+        "description": "Master Reset (active HIGH). A high level asynchronously resets all 14 counter stages to 0 and disables the oscillator. HC has CMOS input levels; HCT has TTL input levels (VIH \u2265 2V, VIL \u2264 0.8V)."       },       {         "number": "13",