← Commit history

Set visibility: public

Ray ·9bfb68d503 · ·parent 15bc87e
1 file changed +9−6
page.json+9−6
@@ -32,7 +32,7 @@         "number": "1",         "name": "Q12",         "type": "output",-        "description": "Counter stage 12 output. CMOS output driving 10 LSTTL loads; VOH \u2265 4.4V at VCC=4.5V (CMOS load)."+        "description": "Counter stage 12 output. CMOS output driving 10 LSTTL loads; VOH ≥ 4.4V at VCC=4.5V (CMOS load)."       },       {         "number": "2",@@ -80,25 +80,25 @@         "number": "9",         "name": "phiO",         "type": "output",-        "description": "Oscillator output (\u03c6O). Buffered output of the internal oscillator; used with external R/C or crystal network to close the oscillator loop."+        "description": "Oscillator output (φO). Buffered output of the internal oscillator; used with external R/C or crystal network to close the oscillator loop."       },       {         "number": "10",         "name": "~phiO",         "type": "output",-        "description": "Inverted oscillator output (\u03c6O-bar). Complement of pin 9; used with the external oscillator network."+        "description": "Inverted oscillator output (φO-bar). Complement of pin 9; used with the external oscillator network."       },       {         "number": "11",         "name": "phiI",         "type": "input",-        "description": "Oscillator/clock input (\u03c6I) with Schmitt-trigger action. Counter advances on the negative (falling) transition. When used with an external oscillator network the internal oscillator is closed through this pin."+        "description": "Oscillator/clock input (φI) with Schmitt-trigger action. Counter advances on the negative (falling) transition. When used with an external oscillator network the internal oscillator is closed through this pin."       },       {         "number": "12",         "name": "MR",         "type": "input",-        "description": "Master Reset (active HIGH). A high level asynchronously resets all 14 counter stages to 0 and disables the oscillator. HC has CMOS input levels; HCT has TTL input levels (VIH \u2265 2V, VIL \u2264 0.8V)."+        "description": "Master Reset (active HIGH). A high level asynchronously resets all 14 counter stages to 0 and disables the oscillator. HC has CMOS input levels; HCT has TTL input levels (VIH ≥ 2V, VIL ≤ 0.8V)."       },       {         "number": "13",@@ -186,5 +186,8 @@     "docs/cd74hc4060pwr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file