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docs cd74hc4053pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
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cd74hc4053pwr-etched.fit.json cd74hc4053pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74hc4053pwr-etched.glb cd74hc4053pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
cd74hc4053pwr-etched.step cd74hc4053pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
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package.json cd74hc4053pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray
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README.md Initial commit: component/cd74hc4053pwr · Ray

CD74HC4053PWR

Texas Instruments · Analog Switches, Multiplexers · TSSOP-16

CD74HC4053PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B1 bidirectional B1 channel Y analog signal; bidirectional switch terminal for B section supporting ±5V maximum analog range.
2 B0 bidirectional B0 channel X analog signal; bidirectional switch terminal for B section supporting ±5V maximum analog range.
3 C1 bidirectional C1 channel Y analog signal; bidirectional switch terminal for C section supporting ±5V maximum analog range.
4 COM C bidirectional C common analog terminal; switch common connecting to C0 or C1 channels based on S2 binary input level.
5 C0 bidirectional C0 channel X analog signal; bidirectional switch terminal for C section supporting ±5V maximum analog range.
6 !E input Enable control (active low); logic input disabling all switches when high, VIH min 2V and VIL max 0.8V at 4.5-5.5V VCC.
7 VEE power_in Negative power supply; voltage range 0V to -6V serving as negative supply reference.
8 GND power_in Signal ground; reference potential for logic and analog signals.
9 S2 input Channel select 2 (C-section); logic input selecting between C1 (high) and C0 (low) channels.
10 S1 input Channel select 1 (B-section); logic input selecting between B1 (high) and B0 (low) channels.
11 S0 input Channel select 0 (A-section); logic input selecting between A1 (high) and A0 (low) channels.
12 A0 bidirectional A0 channel X analog signal; bidirectional switch terminal for A section supporting ±5V maximum analog range.
13 A1 bidirectional A1 channel Y analog signal; bidirectional switch terminal for A section supporting ±5V maximum analog range.
14 COM A bidirectional A common analog terminal; switch common connecting to A0 or A1 channels based on S0 binary input level.
15 COM B bidirectional B common analog terminal; switch common connecting to B0 or B1 channels based on S1 binary input level.
16 VCC power_in Positive power supply; voltage range 2V to 6V supporting dual-supply operation with VEE to -6V (VCC-VEE max 10V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: CD74HC4053PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc4053pwr-etched.step / cd74hc4053pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc4053pwr.step / cd74hc4053pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 7468e76b094edd14, retrieved 2026-09-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF