component
CD74HC4050M96
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CD74HC4050M96++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-16++CD74HC4050M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Supply voltage pin, accepts 2V to 6V for HC types |+| 2 | 1Y | output | Non-inverting buffer output for stage 1, output range 0V to VCC |+| 3 | 1A | input | Input for buffer stage 1, accepts logic levels 0V to 15V for level translation capability |+| 4 | 2Y | output | Non-inverting buffer output for stage 2, output range 0V to VCC |+| 5 | 2A | input | Input for buffer stage 2, accepts logic levels 0V to 15V for level translation capability |+| 6 | 3Y | output | Non-inverting buffer output for stage 3, output range 0V to VCC |+| 7 | GND | power_in | Ground reference voltage |+| 8 | 3A | input | Input for buffer stage 3, accepts logic levels 0V to 15V for level translation capability |+| 9 | NC | unconnected | No connection |+| 10 | 6A | input | Input for buffer stage 6, accepts logic levels 0V to 15V for level translation capability |+| 11 | NC | unconnected | No connection |+| 12 | 5Y | output | Non-inverting buffer output for stage 5, output range 0V to VCC |+| 13 | 5A | input | Input for buffer stage 5, accepts logic levels 0V to 15V for level translation capability |+| 14 | 4Y | output | Non-inverting buffer output for stage 4, output range 0V to VCC |+| 15 | 4A | input | Input for buffer stage 4, accepts logic levels 0V to 15V for level translation capability |+| 16 | 6Y | output | Non-inverting buffer output for stage 6, output range 0V to VCC |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74HC4050M96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd74hc4050m96-etched.step` / `cd74hc4050m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hc4050m96.step` / `cd74hc4050m96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hc4050) (11 pp, sha256 `2d5643ffe4911f23`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hc4050m96-datasheet.pdf)
page.jsonadded+189@@ -0,0 +1,189 @@+{+ "slug": "cd74hc4050m96",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd74hc4050m96",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd74hc4050m96.kicad_sym",+ "cd74hc4050m96.kicad_mod",+ "cd74hc4050m96.glb",+ "cd74hc4050m96.step",+ "cd74hc4050m96.lbr",+ "docs/hero.png",+ "docs/cd74hc4050m96-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD74HC4050M96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Buffers, Drivers, Receivers, Transceivers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hc4050",+ "parts": {+ "symbol": "cd74hc4050m96.kicad_sym",+ "footprint": "cd74hc4050m96.kicad_mod",+ "model_3d": "cd74hc4050m96-etched.glb",+ "model_3d_plain": "cd74hc4050m96.glb",+ "model_3d_step": "cd74hc4050m96-etched.step",+ "model_3d_step_plain": "cd74hc4050m96.step",+ "lbr": "cd74hc4050m96.lbr"+ },+ "distributor_links": {+ "lcsc": "C131932"+ },+ "pins": [+ {+ "number": "1",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage pin, accepts 2V to 6V for HC types"+ },+ {+ "number": "2",+ "name": "1Y",+ "type": "output",+ "description": "Non-inverting buffer output for stage 1, output range 0V to VCC"+ },+ {+ "number": "3",+ "name": "1A",+ "type": "input",+ "description": "Input for buffer stage 1, accepts logic levels 0V to 15V for level translation capability"+ },+ {+ "number": "4",+ "name": "2Y",+ "type": "output",+ "description": "Non-inverting buffer output for stage 2, output range 0V to VCC"+ },+ {+ "number": "5",+ "name": "2A",+ "type": "input",+ "description": "Input for buffer stage 2, accepts logic levels 0V to 15V for level translation capability"+ },+ {+ "number": "6",+ "name": "3Y",+ "type": "output",+ "description": "Non-inverting buffer output for stage 3, output range 0V to VCC"+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference voltage"+ },+ {+ "number": "8",+ "name": "3A",+ "type": "input",+ "description": "Input for buffer stage 3, accepts logic levels 0V to 15V for level translation capability"+ },+ {+ "number": "9",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection"+ },+ {+ "number": "10",+ "name": "6A",+ "type": "input",+ "description": "Input for buffer stage 6, accepts logic levels 0V to 15V for level translation capability"+ },+ {+ "number": "11",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection"+ },+ {+ "number": "12",+ "name": "5Y",+ "type": "output",+ "description": "Non-inverting buffer output for stage 5, output range 0V to VCC"+ },+ {+ "number": "13",+ "name": "5A",+ "type": "input",+ "description": "Input for buffer stage 5, accepts logic levels 0V to 15V for level translation capability"+ },+ {+ "number": "14",+ "name": "4Y",+ "type": "output",+ "description": "Non-inverting buffer output for stage 4, output range 0V to VCC"+ },+ {+ "number": "15",+ "name": "4A",+ "type": "input",+ "description": "Input for buffer stage 4, accepts logic levels 0V to 15V for level translation capability"+ },+ {+ "number": "16",+ "name": "6Y",+ "type": "output",+ "description": "Non-inverting buffer output for stage 6, output range 0V to VCC"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 11,+ "cost_usd": 0.3942,+ "at": "2026-09-22T20:56:33"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd74hc4050",+ "pages": 11,+ "sha256": "2d5643ffe4911f23",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}