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CD74HC4046APWR

Public Made by Adom

by adom

Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CD74HC4046APWR

Texas Instruments · Clock Generators, PLLs, Frequency Synthesizers · TSSOP-16

CD74HC4046APWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PCPOUT output Phase comparator pulse output; the datasheet names this function but gives no electrical limits for this pin.
2 PC1OUT output Phase comparator 1 output, which is an Exclusive-OR network whose average output is filtered to the VCO input.
3 COMPIN input Comparator input that receives the VCO output, either directly or through a frequency divider, for comparison with SIGIN.
4 VCOOUT output VCO output with a specified 50% duty factor, connectable directly to COMPIN or through a frequency divider.
5 INH input Inhibit input where a LOW level enables the VCO and demodulator and a HIGH level turns both off to minimize standby power consumption.
6 C1A passive Connection A for external capacitor C1, which together with R1 determines the VCO frequency range.
7 C1B passive Connection B for external capacitor C1, connected between C1A and C1B.
8 GND power_in Ground (0V) reference for the device.
9 VCOIN input VCO input with high input impedance, which simplifies low-pass filter design.
10 DEMOUT output Demodulator output equal to the VCO input voltage; if used a load resistor RS should go from DEMOUT to GND, and if unused it should be left open.
11 R1 passive Resistor R1 connection, where R1 to GND together with C1 sets the VCO frequency range.
12 R2 passive Resistor R2 connection, where R2 to GND gives the VCO a frequency offset if required.
13 PC2OUT output Phase comparator 2 output; with no signal at SIGIN the VCO adjusts to fMIN.
14 SIGIN input Signal input that can be directly coupled within the HC family input logic levels, or capacitively coupled for smaller signal swings.
15 PC3OUT output Phase comparator 3 output; with no signal at SIGIN the VCO adjusts to fMAX.
16 VCC power_in Positive supply voltage; the VCO section is specified for 3V to 6V and the digital section for 2V to 6V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Clock/Timing
Pins 16

CAD (KiCad official)

  • Symbol: CD74HC4046APWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc4046apwr-etched.step / cd74hc4046apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc4046apwr.step / cd74hc4046apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 047ac408a2e3bcfc, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF