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CD74HC30PWR

Public Made by Adom

by adom

Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs cd74hc30pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cd74hc30pwr: viewers · Ray
cd74hc30pwr-etched.fit.json cd74hc30pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74hc30pwr-etched.glb cd74hc30pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
cd74hc30pwr-etched.step cd74hc30pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
cd74hc30pwr.glb Publish 0.1.0 · Ray
cd74hc30pwr.kicad_mod Publish 0.1.0 · Ray
cd74hc30pwr.kicad_sym Publish 0.1.0 · Ray
cd74hc30pwr.lbr Publish 0.1.0 · Ray
cd74hc30pwr.step Publish 0.1.0 · Ray
package.json cd74hc30pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
page.json cd74hc30pwr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
README.md Initial commit: component/cd74hc30pwr · Ray

CD74HC30PWR

Texas Instruments · Logic Gates · TSSOP-14

CD74HC30PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Input A to 8-input NAND gate with buffered CMOS input
2 B input Input B to 8-input NAND gate with buffered CMOS input
3 C input Input C to 8-input NAND gate with buffered CMOS input
4 D input Input D to 8-input NAND gate with buffered CMOS input
5 E input Input E to 8-input NAND gate with buffered CMOS input
6 F input Input F to 8-input NAND gate with buffered CMOS input
7 GND power_in Ground reference
8 Y output Output of 8-input NAND gate with balanced CMOS push-pull drive capability
9 NC unconnected Not internally connected
10 NC unconnected Not internally connected
11 G input Input G to 8-input NAND gate with buffered CMOS input
12 H input Input H to 8-input NAND gate with buffered CMOS input
13 NC unconnected Not internally connected
14 VCC power_in Positive supply voltage with recommended operating range 2 V to 6 V

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD74HC30PWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: cd74hc30pwr-etched.step / cd74hc30pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc30pwr.step / cd74hc30pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 bc7824dcd0cc12fa, retrieved 2026-09-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF