main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 11d ago
viewers cd74hc251m96: viewers · Ray 11d ago
cd74hc251m96-etched.glb cd74hc251m96: factory component page (tier=lcsc) · Ray 11d ago
cd74hc251m96-etched.step cd74hc251m96: factory component page (tier=lcsc) · Ray 11d ago
cd74hc251m96-hero.glb cd74hc251m96: hero GLB from the etched model (keeps the MPN mark) · Ray 11d ago
cd74hc251m96-hero.overlay.json Publish 0.1.0 · Ray 11d ago
cd74hc251m96.glb Publish 0.1.0 · Ray 11d ago
cd74hc251m96.kicad_mod Publish 0.1.0 · Ray 11d ago
cd74hc251m96.kicad_sym Publish 0.1.0 · Ray 11d ago
cd74hc251m96.lbr Publish 0.1.0 · Ray 11d ago
cd74hc251m96.step Publish 0.1.0 · Ray 11d ago
package.json Publish 0.1.0 · Ray 11d ago
page.json Set visibility: public · Ray 11d ago
README.md Publish 0.1.0 · Ray 11d ago

CD74HC251M96

Texas Instruments · Signal Switches, Multiplexers, Decoders · SOIC-16

CD74HC251M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I3 input Data input 3, routed to Y and Y-bar when select code S2S1S0 = LHH and OE is low.
2 I2 input Data input 2, routed to Y and Y-bar when select code S2S1S0 = LHL and OE is low.
3 I1 input Data input 1, routed to Y and Y-bar when select code S2S1S0 = LLH and OE is low.
4 I0 input Data input 0, routed to Y and Y-bar when select code S2S1S0 = LLL and OE is low.
5 Y tri_state True three-state output that follows the selected data input and is high-impedance when OE is high.
6 Y̅ tri_state Complementary three-state output that is the inverse of the selected data input and is high-impedance when OE is high.
7 OE̅ input Active-low output enable; must be low to enable the device and puts both outputs in high-impedance when high.
8 GND power_in Ground pin.
9 S2 input Data select input, most significant bit of the 3-bit address that selects one of eight data inputs.
10 S1 input Data select input, middle bit of the 3-bit address that selects one of eight data inputs.
11 S0 input Data select input, least significant bit of the 3-bit address that selects one of eight data inputs.
12 I7 input Data input 7, routed to Y and Y-bar when select code S2S1S0 = HHH and OE is low.
13 I6 input Data input 6, routed to Y and Y-bar when select code S2S1S0 = HHL and OE is low.
14 I5 input Data input 5, routed to Y and Y-bar when select code S2S1S0 = HLH and OE is low.
15 I4 input Data input 4, routed to Y and Y-bar when select code S2S1S0 = HLL and OE is low.
16 VCC power_in Supply voltage, 2 V to 6 V for HC types, with a 0.1-uF bypass capacitor recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD74HC251M96
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc251m96-etched.step / cd74hc251m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc251m96.step / cd74hc251m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (21 pp, sha256 fc13f4be219dfc83, retrieved 2026-10-12, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF