← Commit history

Initial commit: component/cd74hc221m96

Ray ·538f8742c3 ·
2 files changed +243
README.mdadded+52
@@ -0,0 +1,52 @@+# CD74HC221M96++**Texas Instruments** · Monostable Multivibrators · SOIC-16++CD74HC221M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Trailing-edge (active-LOW falling) trigger input for monostable 1; triggers on HIGH-to-LOW transition when 1B is HIGH and 1R is HIGH. |+| 2 | 1B | input | Leading-edge (active-HIGH rising) Schmitt-trigger input for monostable 1; triggers on LOW-to-HIGH transition when 1A is LOW and 1R is HIGH; rise/fall time unlimited. |+| 3 | 1R | input | Active-LOW overriding reset input for monostable 1; a LOW level immediately terminates the output pulse, forcing 1Q LOW and 1Q̄ HIGH; minimum pulse width 14 ns at 4.5 V. |+| 4 | 1Q̄ | output | Buffered complementary output of monostable 1; idles HIGH, pulses LOW for tW = 0.7 × RX × CX; VOH ≥ 4.4 V and VOL ≤ 0.1 V at VCC = 4.5 V, IO = ±0.02 mA. |+| 5 | 2Q | output | Buffered true output of monostable 2; idles LOW, pulses HIGH for tW = 0.7 × RX × CX; VOH ≥ 4.4 V and VOL ≤ 0.1 V at VCC = 4.5 V, IO = ±0.02 mA. |+| 6 | 2CX | passive | External timing capacitor (CX) connection for monostable 2; CX is connected between this pin and GND; minimum CX = 0 pF. |+| 7 | 2CXRX | passive | External timing resistor-capacitor junction for monostable 2; RX connected between this pin and VCC, CX between pin 6 and GND; minimum RX = 500 Ω typical. |+| 8 | GND | power_in | Ground (0 V) supply reference; maximum DC VCC or ground current ICC = ±50 mA. |+| 9 | 2A | input | Trailing-edge (active-LOW falling) trigger input for monostable 2; triggers on HIGH-to-LOW transition when 2B is HIGH and 2R is HIGH. |+| 10 | 2B | input | Leading-edge (active-HIGH rising) Schmitt-trigger input for monostable 2; triggers on LOW-to-HIGH transition when 2A is LOW and 2R is HIGH; rise/fall time unlimited. |+| 11 | 2R | input | Active-LOW overriding reset input for monostable 2; a LOW level immediately terminates the output pulse, forcing 2Q LOW and 2Q̄ HIGH; minimum pulse width 14 ns at 4.5 V. |+| 12 | 2Q̄ | output | Buffered complementary output of monostable 2; idles HIGH, pulses LOW for tW = 0.7 × RX × CX; VOH ≥ 4.4 V and VOL ≤ 0.1 V at VCC = 4.5 V, IO = ±0.02 mA. |+| 13 | 1Q | output | Buffered true output of monostable 1; idles LOW, pulses HIGH for tW = 0.7 × RX × CX; VOH ≥ 4.4 V and VOL ≤ 0.1 V at VCC = 4.5 V, IO = ±0.02 mA. |+| 14 | 1CX | passive | External timing capacitor (CX) connection for monostable 1; CX is connected between this pin and GND; minimum CX = 0 pF. |+| 15 | 1CXRX | passive | External timing resistor-capacitor junction for monostable 1; RX connected between this pin and VCC, CX between pin 14 and GND; minimum RX = 500 Ω typical. |+| 16 | VCC | power_in | Positive supply voltage; HC type 2 V to 6 V operating range, absolute maximum −0.5 V to 7 V; quiescent ICC ≤ 8 µA typical at 6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74HC221M96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd74hc221m96-etched.step` / `cd74hc221m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hc221m96.step` / `cd74hc221m96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hc221) (25 pp, sha256 `7f1f24f5229cfed7`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hc221m96-datasheet.pdf)
page.jsonadded+191
@@ -0,0 +1,191 @@+{+  "slug": "cd74hc221m96",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Monostable Multivibrators, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "cd74hc221m96",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd74hc221m96.kicad_sym",+    "cd74hc221m96.kicad_mod",+    "cd74hc221m96.glb",+    "cd74hc221m96.step",+    "cd74hc221m96.lbr",+    "docs/hero.png",+    "docs/cd74hc221m96-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "CD74HC221M96",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Logic",+    "subcategory": "Monostable Multivibrators",+    "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hc221",+    "parts": {+      "symbol": "cd74hc221m96.kicad_sym",+      "footprint": "cd74hc221m96.kicad_mod",+      "model_3d": "cd74hc221m96-etched.glb",+      "model_3d_plain": "cd74hc221m96.glb",+      "model_3d_step": "cd74hc221m96-etched.step",+      "model_3d_step_plain": "cd74hc221m96.step",+      "lbr": "cd74hc221m96.lbr"+    },+    "distributor_links": {+      "lcsc": "C133954"+    },+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Trailing-edge (active-LOW falling) trigger input for monostable 1; triggers on HIGH-to-LOW transition when 1B is HIGH and 1R is HIGH."+      },+      {+        "number": "2",+        "name": "1B",+        "type": "input",+        "description": "Leading-edge (active-HIGH rising) Schmitt-trigger input for monostable 1; triggers on LOW-to-HIGH transition when 1A is LOW and 1R is HIGH; rise/fall time unlimited."+      },+      {+        "number": "3",+        "name": "1R",+        "type": "input",+        "description": "Active-LOW overriding reset input for monostable 1; a LOW level immediately terminates the output pulse, forcing 1Q LOW and 1Q̄ HIGH; minimum pulse width 14 ns at 4.5 V."+      },+      {+        "number": "4",+        "name": "1Q̄",+        "type": "output",+        "description": "Buffered complementary output of monostable 1; idles HIGH, pulses LOW for tW = 0.7 × RX × CX; VOH ≥ 4.4 V and VOL ≤ 0.1 V at VCC = 4.5 V, IO = ±0.02 mA."+      },+      {+        "number": "5",+        "name": "2Q",+        "type": "output",+        "description": "Buffered true output of monostable 2; idles LOW, pulses HIGH for tW = 0.7 × RX × CX; VOH ≥ 4.4 V and VOL ≤ 0.1 V at VCC = 4.5 V, IO = ±0.02 mA."+      },+      {+        "number": "6",+        "name": "2CX",+        "type": "passive",+        "description": "External timing capacitor (CX) connection for monostable 2; CX is connected between this pin and GND; minimum CX = 0 pF."+      },+      {+        "number": "7",+        "name": "2CXRX",+        "type": "passive",+        "description": "External timing resistor-capacitor junction for monostable 2; RX connected between this pin and VCC, CX between pin 6 and GND; minimum RX = 500 Ω typical."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground (0 V) supply reference; maximum DC VCC or ground current ICC = ±50 mA."+      },+      {+        "number": "9",+        "name": "2A",+        "type": "input",+        "description": "Trailing-edge (active-LOW falling) trigger input for monostable 2; triggers on HIGH-to-LOW transition when 2B is HIGH and 2R is HIGH."+      },+      {+        "number": "10",+        "name": "2B",+        "type": "input",+        "description": "Leading-edge (active-HIGH rising) Schmitt-trigger input for monostable 2; triggers on LOW-to-HIGH transition when 2A is LOW and 2R is HIGH; rise/fall time unlimited."+      },+      {+        "number": "11",+        "name": "2R",+        "type": "input",+        "description": "Active-LOW overriding reset input for monostable 2; a LOW level immediately terminates the output pulse, forcing 2Q LOW and 2Q̄ HIGH; minimum pulse width 14 ns at 4.5 V."+      },+      {+        "number": "12",+        "name": "2Q̄",+        "type": "output",+        "description": "Buffered complementary output of monostable 2; idles HIGH, pulses LOW for tW = 0.7 × RX × CX; VOH ≥ 4.4 V and VOL ≤ 0.1 V at VCC = 4.5 V, IO = ±0.02 mA."+      },+      {+        "number": "13",+        "name": "1Q",+        "type": "output",+        "description": "Buffered true output of monostable 1; idles LOW, pulses HIGH for tW = 0.7 × RX × CX; VOH ≥ 4.4 V and VOL ≤ 0.1 V at VCC = 4.5 V, IO = ±0.02 mA."+      },+      {+        "number": "14",+        "name": "1CX",+        "type": "passive",+        "description": "External timing capacitor (CX) connection for monostable 1; CX is connected between this pin and GND; minimum CX = 0 pF."+      },+      {+        "number": "15",+        "name": "1CXRX",+        "type": "passive",+        "description": "External timing resistor-capacitor junction for monostable 1; RX connected between this pin and VCC, CX between pin 14 and GND; minimum RX = 500 Ω typical."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply voltage; HC type 2 V to 6 V operating range, absolute maximum −0.5 V to 7 V; quiescent ICC ≤ 8 µA typical at 6 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: PAGE 1 contains a pinout diagram for CD74HC221 (PDIP, SOIC, SOP, TSSOP) but the ASCII representation"+        ],+        "pages_sent": 25,+        "cost_usd": 0.5667,+        "at": "2026-09-22T01:27:54"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/cd74hc221",+        "pages": 25,+        "sha256": "7f1f24f5229cfed7",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file