component
CD74HC21M96
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
master
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"package": "SOIC-14",
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"category": "Logic",
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"description": "Input channel 1, input A of the first 4-input AND gate, which performs Y = A ● B ● C ● D in positive logic."
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{
"number": "2",
"name": "1B",
"type": "input",
"description": "Input channel 1, input B of the first 4-input AND gate, which performs Y = A ● B ● C ● D in positive logic."
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{
"number": "3",
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{
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},
{
"number": "5",
"name": "1D",
"type": "input",
"description": "Input channel 1, input D of the first 4-input AND gate, which performs Y = A ● B ● C ● D in positive logic."
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{
"number": "6",
"name": "1Y",
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{
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{
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"description": "Input channel 2, input C of the second 4-input AND gate, which performs Y = A ● B ● C ● D in positive logic."
},
{
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"type": "input",
"description": "Input channel 2, input D of the second 4-input AND gate, which performs Y = A ● B ● C ● D in positive logic."
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{
"number": "14",
"name": "VCC",
"type": "power_in",
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"extractor flagged: The pin table on page 3 is shared by the D (SOIC), N (PDIP) and J (CDIP) packages. The 14-pin SOIC (; NC is listed on two pins (3 and 11); each is reported as a separate entry. Their datasheet descripti; The datasheet gives no per-pin electrical limits for the input pins, so input descriptions are limit"
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