CD74HC194PWT

{
  "slug": "cd74hc194pwt",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "cd74hc194pwt",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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  "files": [
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    "README.md",
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    "cd74hc194pwt.glb",
    "cd74hc194pwt.step",
    "cd74hc194pwt.lbr",
    "docs/hero.png",
    "docs/cd74hc194pwt-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
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    "cd74hc194pwt-hero.overlay.json"
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  "component": {
    "mpn": "CD74HC194PWT",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hc194",
    "parts": {
      "symbol": "cd74hc194pwt.kicad_sym",
      "footprint": "cd74hc194pwt.kicad_mod",
      "model_3d": "cd74hc194pwt-hero.glb",
      "model_3d_plain": "cd74hc194pwt.glb",
      "model_3d_step": "cd74hc194pwt-etched.step",
      "model_3d_step_plain": "cd74hc194pwt.step",
      "lbr": "cd74hc194pwt.lbr"
    },
    "distributor_links": {
      "lcsc": "C2864707",
      "digikey": "296-CD74HC194PWTTR-ND",
      "mouser": "595-CD74HC194PWT"
    },
    "distributor_check": {
      "checked_at": "2026-10-05T20:18:20Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-CD74HC194PWTTR-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "595-CD74HC194PWT",
        "status": "found",
        "lifecycle": "Obsolete"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "MR",
        "type": "input",
        "description": "Asynchronous master reset, active low; a Low clears all four outputs Q0-Q3 to Low."
      },
      {
        "number": "2",
        "name": "DSR",
        "type": "input",
        "description": "Serial data input for the shift-right mode."
      },
      {
        "number": "3",
        "name": "D0",
        "type": "input",
        "description": "Parallel data input 0, loaded to Q0 on the rising clock edge when S0 and S1 are high."
      },
      {
        "number": "4",
        "name": "D1",
        "type": "input",
        "description": "Parallel data input 1, loaded to Q1 on the rising clock edge when S0 and S1 are high."
      },
      {
        "number": "5",
        "name": "D2",
        "type": "input",
        "description": "Parallel data input 2, loaded to Q2 on the rising clock edge when S0 and S1 are high."
      },
      {
        "number": "6",
        "name": "D3",
        "type": "input",
        "description": "Parallel data input 3, loaded to Q3 on the rising clock edge when S0 and S1 are high."
      },
      {
        "number": "7",
        "name": "DSL",
        "type": "input",
        "description": "Serial data input for the shift-left mode."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground supply pin."
      },
      {
        "number": "9",
        "name": "S0",
        "type": "input",
        "description": "Mode select input 0; with S1 selects hold, shift right, shift left or parallel load."
      },
      {
        "number": "10",
        "name": "S1",
        "type": "input",
        "description": "Mode select input 1; with S0 selects hold, shift right, shift left or parallel load."
      },
      {
        "number": "11",
        "name": "CP",
        "type": "input",
        "description": "Clock input; operations occur synchronously on the low-to-high transition."
      },
      {
        "number": "12",
        "name": "Q3",
        "type": "output",
        "description": "Register output 3; bus driver output capable of driving 15 LSTTL loads."
      },
      {
        "number": "13",
        "name": "Q2",
        "type": "output",
        "description": "Register output 2; bus driver output capable of driving 15 LSTTL loads."
      },
      {
        "number": "14",
        "name": "Q1",
        "type": "output",
        "description": "Register output 1; bus driver output capable of driving 15 LSTTL loads."
      },
      {
        "number": "15",
        "name": "Q0",
        "type": "output",
        "description": "Register output 0; bus driver output capable of driving 15 LSTTL loads."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply; 2V to 6V operation for HC types, absolute maximum -0.5V to 7V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin assignments for CP (pin 7) derived from Functional Diagram layout on PAGE 2 where it is listed s"
        ],
        "pages_sent": 19,
        "cost_usd": 0.1679,
        "at": "2026-10-05T20:18:04"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/cd74hc194",
        "pages": 19,
        "sha256": "b36bc476fcd32b97",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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}