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Contents

README

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CD74HC194M96

Texas Instruments · Shift Registers · SOIC-16

CD74HC194M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input Asynchronous master reset, active Low; a Low clears all four outputs Q0-Q3 to Low.
2 DSR input Serial data input for the shift-right mode.
3 D0 input Parallel data input 0, loaded into the first flip-flop when S0 and S1 are high on the rising clock edge.
4 D1 input Parallel data input 1, loaded when S0 and S1 are high on the rising clock edge.
5 D2 input Parallel data input 2, loaded when S0 and S1 are high on the rising clock edge.
6 D3 input Parallel data input 3, loaded when S0 and S1 are high on the rising clock edge.
7 DSL input Serial data input for the shift-left mode.
8 GND power_in Ground (0V) supply pin.
9 S0 input Mode select input 0; with S1 selects hold, shift left, shift right or parallel load.
10 S1 input Mode select input 1; with S0 selects hold, shift left, shift right or parallel load.
11 CP input Clock input; shifting and loading occur on the low-to-high transition.
12 Q3 output Register output 3 (last stage), standard output driving 10 LSTTL loads.
13 Q2 output Register output 2, standard output driving 10 LSTTL loads.
14 Q1 output Register output 1, standard output driving 10 LSTTL loads.
15 Q0 output Register output 0 (first stage), standard output driving 10 LSTTL loads.
16 VCC power_in Positive supply voltage, 2V to 6V for HC types (absolute maximum 7V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage VCC -0.5 7 V 3
DC Input Diode Current IIK -20 20 mA For VI < -0.5 V or VI > VCC + 0.5 V 3
DC Output Diode Current IOK -20 20 mA For VO < -0.5 V or VO > VCC + 0.5 V 3
DC Output Source or Sink Current per Output Pin IO -25 25 mA For VO > -0.5 V or VO < VCC + 0.5 V 3
DC VCC or Ground Current ICC or IGND -50 50 mA 3
Maximum Storage Temperature Range -65 150 °C 3
Maximum Junction Temperature 150 °C 3
Maximum Lead Temperature (Soldering) 300 °C 10 s; SOIC lead tips only 3
Supply Voltage Range, HC Types VCC 2 6 V HC types 3
Supply Voltage Range, HCT Types VCC 4.5 5.5 V HCT types 3
Temperature Range TA -55 125 °C 3
Input Rise and Fall Time 1000 ns VCC = 2 V 3
Input Rise and Fall Time 500 ns VCC = 4.5 V 3
Input Rise and Fall Time 400 ns VCC = 6 V 3
High Level Input Voltage VIH 1.5 V VCC = 2 V; -55 °C to 125 °C 3
High Level Input Voltage VIH 3.15 V VCC = 4.5 V; -55 °C to 125 °C 3
High Level Input Voltage VIH 4.2 V VCC = 6 V; -55 °C to 125 °C 3
Low Level Input Voltage VIL 0.5 V VCC = 2 V; -55 °C to 125 °C 3
Low Level Input Voltage VIL 1.35 V VCC = 4.5 V; -55 °C to 125 °C 3
Low Level Input Voltage VIL 1.8 V VCC = 6 V; -55 °C to 125 °C 3
High Level Output Voltage, CMOS Loads VOH 1.9 V VI = VIH or VIL; IO = -0.02 mA; VCC = 2 V; -55 °C to 125 °C 3
High Level Output Voltage, CMOS Loads VOH 4.4 V VI = VIH or VIL; IO = -0.02 mA; VCC = 4.5 V; -55 °C to 125 °C 3
High Level Output Voltage, CMOS Loads VOH 5.9 V VI = VIH or VIL; IO = -0.02 mA; VCC = 6 V; -55 °C to 125 °C 3
High Level Output Voltage, TTL Loads VOH 3.7 V IO = -4 mA; VCC = 4.5 V; -55 °C to 125 °C 3
High Level Output Voltage, TTL Loads VOH 5.2 V IO = -5.2 mA; VCC = 6 V; -55 °C to 125 °C 3
Low Level Output Voltage, CMOS Loads VOL 0.1 V VI = VIH or VIL; IO = 0.02 mA; VCC = 2 V; -55 °C to 125 °C 3
Low Level Output Voltage, TTL Loads VOL 0.4 V IO = 4 mA; VCC = 4.5 V; -55 °C to 125 °C 3
Input Leakage Current II -1 1 µA VI = VCC or GND; VCC = 6 V; -55 °C to 125 °C 4
Quiescent Device Current ICC 160 µA VI = VCC or GND; IO = 0 mA; VCC = 6 V; -55 °C to 125 °C 4
High Level Input Voltage, HCT VIH 2 V VCC = 4.5 to 5.5 V; -55 °C to 125 °C 4
Low Level Input Voltage, HCT VIL 0.8 V VCC = 4.5 to 5.5 V; -55 °C to 125 °C 4
High Level Output Voltage, CMOS Loads, HCT VOH 4.4 V VI = VIH or VIL; IO = -0.02 mA; VCC = 4.5 V; -55 °C to 125 °C 4
High Level Output Voltage, TTL Loads, HCT VOH 3.7 V IO = -4 mA; VCC = 4.5 V; -55 °C to 125 °C 4
Low Level Output Voltage, CMOS Loads, HCT VOL 0.1 V VI = VIH or VIL; IO = 0.02 mA; VCC = 4.5 V; -55 °C to 125 °C 4
Low Level Output Voltage, TTL Loads, HCT VOL 0.4 V IO = 4 mA; VCC = 4.5 V; -55 °C to 125 °C 4
Input Leakage Current, HCT II -1 1 µA VI = VCC to GND; VCC = 0 to 5.5 V; -55 °C to 125 °C 4
Quiescent Device Current, HCT ICC 160 µA VI = VCC or GND; IO = 0 mA; VCC = 0 to 5.5 V; -55 °C to 125 °C 4
Additional Quiescent Device Current Per Input Pin: 1 Unit Load ∆ICC 490 µA VI = VCC - 2.1 V; VCC = 4.5 to 5.5 V; -55 °C to 125 °C 4
Max. Clock Frequency (Figure 1) fMAX 4 MHz VCC = 2 V; -55 °C to 125 °C 5
Max. Clock Frequency (Figure 1) fMAX 20 MHz VCC = 4.5 V; -55 °C to 125 °C 5
Max. Clock Frequency (Figure 1) fMAX 23 MHz VCC = 6 V; -55 °C to 125 °C 5
Max. Clock Frequency (Figure 1), HCT fMAX 18 MHz VCC = 4.5 V; -55 °C to 125 °C 5
MR Pulse Width (Figure 2) tW 120 ns VCC = 2 V; -55 °C to 125 °C 5
MR Pulse Width (Figure 2) tW 24 ns VCC = 4.5 V; -55 °C to 125 °C 5
MR Pulse Width (Figure 2) tW 20 ns VCC = 6 V; -55 °C to 125 °C 5
Clock Pulse Width (Figure 1) tW 120 ns VCC = 2 V; -55 °C to 125 °C 5
Clock Pulse Width (Figure 1) tW 24 ns VCC = 4.5 V; -55 °C to 125 °C 5
Clock Pulse Width (Figure 1) tW 20 ns VCC = 6 V; -55 °C to 125 °C 5
Set-up Time, Data to Clock (Figure 3) tSU 105 ns VCC = 2 V; -55 °C to 125 °C 5
Set-up Time, Data to Clock (Figure 3) tSU 21 ns VCC = 4.5 V; -55 °C to 125 °C 5
Set-up Time, Data to Clock (Figure 3) tSU 19 ns VCC = 6 V; -55 °C to 125 °C 5
Propagation Delay, Clock to Output (Figure 1) tPLH, tPHL 265 ns Input tr, tf = 6 ns; CL = 50 pF; VCC = 2 V; -55 °C to 125 °C 6
Propagation Delay, Clock to Output (Figure 1) tPLH, tPHL 53 ns Input tr, tf = 6 ns; CL = 50 pF; VCC = 4.5 V; -55 °C to 125 °C 6
Propagation Delay, Clock to Output (Figure 1) tPLH, tPHL 45 ns Input tr, tf = 6 ns; CL = 50 pF; VCC = 6 V; -55 °C to 125 °C 6
Propagation Delay, Clock to Output, HCT (Figure 1) tPLH, tPHL 56 ns Input tr, tf = 6 ns; CL = 50 pF; VCC = 4.5 V; -55 °C to 125 °C 6
Input Capacitance CIN 10 pF 6

CAD (KiCad official)

  • Symbol: CD74HC194M96
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc194m96-etched.step / cd74hc194m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc194m96.step / cd74hc194m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 4366a0b1e0c3c2cc, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF