# CD74HC190NSR

**Texas Instruments** · Logic ICs · SO-16-208mil

CD74HC190NSR from Texas Instruments, in a SO-16-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Preset data input B, loaded into the counter when LOAD is low. |
| 2 | QB | output | Counter output QB. |
| 3 | QA | output | Counter output QA. |
| 4 | CTEN | input | Active-low count enable; counting occurs when CTEN is low and LOAD is high. |
| 5 | D/U | input | Down/up control; high counts down, low counts up, and it should be changed only when the clock is high. |
| 6 | QC | output | Counter output QC. |
| 7 | QD | output | Counter output QD. |
| 8 | GND | power_in | Ground. |
| 9 | D | input | Preset data input D, loaded into the counter when LOAD is low. |
| 10 | C | input | Preset data input C, loaded into the counter when LOAD is low. |
| 11 | LOAD | input | Active-low asynchronous parallel load; a low level presets the counter to the data on A-D. |
| 12 | MAX/MIN | output | Goes high and stays high for one clock cycle on counter overflow or underflow, usable for look-ahead carry. |
| 13 | RCO | output | Active-low ripple clock output, normally high, goes low for the low-level portion of the clock pulse when MAX/MIN is high, used for cascading. |
| 14 | CLK | input | Clock input; the counter increments or decrements on the low-to-high transition. |
| 15 | A | input | Preset data input A, loaded into the counter when LOAD is low. |
| 16 | VCC | power_in | Supply voltage, 2 V to 6 V for the HC190. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-16-208mil |
| Category | Logic ICs |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `CD74HC190NSR`
- Footprint: `Adom_Gen:Texas_Instruments_CD74`
- 3D model: SO-16-208mil (KiCad packages3D, STEP)
- 3D model files: `cd74hc190nsr-etched.step` / `cd74hc190nsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hc190nsr.step` / `cd74hc190nsr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd74hc190.pdf) (34 pp, sha256 `c9b6587e141f0d79`, retrieved 2026-10-29, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd74hc190nsr-datasheet.pdf)