CD74HC14EE4 from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Channel 1 Schmitt-trigger input A.
2	1Y	output	Channel 1 inverted output Y.
3	2A	input	Channel 2 Schmitt-trigger input A.
4	2Y	output	Channel 2 inverted output Y.
5	3A	input	Channel 3 Schmitt-trigger input A.
6	3Y	output	Channel 3 inverted output Y.
7	GND	power_in	Ground.
8	4Y	output	Channel 4 inverted output Y.
9	4A	input	Channel 4 Schmitt-trigger input A.
10	5Y	output	Channel 5 inverted output Y.
11	5A	input	Channel 5 Schmitt-trigger input A.
12	6Y	output	Channel 6 inverted output Y.
13	6A	input	Channel 6 Schmitt-trigger input A.
14	VCC	power_in	Positive supply, recommended 2 V to 6 V (absolute max 7 V).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-14
Category	Logic
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage	VCC	-0.5		7	V		4
Input clamp current	IIK	-20		20	mA	VI < -0.5 V or VI > VCC + 0.5 V	4
Output clamp current	IOK	-20		20	mA	VO < -0.5 V or VO > VCC + 0.5 V	4
Continuous output current	IO	-25		25	mA	VO > -0.5 V or VO < VCC + 0.5 V	4
Continuous current through VCC or GND		-50		50	mA		4
Junction temperature	TJ			150	°C	Plastic package	4
Storage temperature	Tstg	-65		150	°C		4
ESD HBM	V(ESD)	-1500		1500	V	Human-body model, ANSI/ESDA/JEDEC JS-001	4
ESD CDM	V(ESD)	-500		500	V	Charged-device model, JESD22-C101	4
Supply voltage	VCC	2	5	6	V		4
High-level input voltage	VIH	1.5			V	VCC = 2 V	4
High-level input voltage	VIH	3.15			V	VCC = 4.5 V	4
High-level input voltage	VIH	4.2			V	VCC = 6 V	4
Low-level input voltage	VIL			0.5	V	VCC = 2 V	4
Low-level input voltage	VIL			1.35	V	VCC = 4.5 V	4
Low-level input voltage	VIL			1.8	V	VCC = 6 V	4
Input voltage	VI	0			V	Max = VCC	4
Output voltage	VO	0			V	Max = VCC	4
Input transition time	tt			1000	ns	VCC = 2 V	4
Input transition time	tt			500	ns	VCC = 4.5 V	4
Input transition time	tt			400	ns	VCC = 6 V	4
Operating free-air temperature	TA	-55		125	°C		4
Positive switching threshold	VT+	0.7		1.5	V	VCC = 2 V, TA = -55°C to 125°C	5
Positive switching threshold	VT+	1.7		3.15	V	VCC = 4.5 V, TA = -55°C to 125°C	5
Positive switching threshold	VT+	2.1		4.2	V	VCC = 6 V, TA = -55°C to 125°C	5
Negative switching threshold	VT-	0.3		1	V	VCC = 2 V, TA = -55°C to 125°C	5
Negative switching threshold	VT-	0.9		2.2	V	VCC = 4.5 V, TA = -55°C to 125°C	5
Negative switching threshold	VT-	1.2		3	V	VCC = 6 V, TA = -55°C to 125°C	5
Hysteresis (VT+ - VT-)	ΔVT	0.2		1	V	VCC = 2 V, TA = -55°C to 125°C	5
Hysteresis (VT+ - VT-)	ΔVT	0.4		1.4	V	VCC = 4.5 V, TA = -55°C to 125°C	5
Hysteresis (VT+ - VT-)	ΔVT	0.6		1.6	V	VCC = 6 V, TA = -55°C to 125°C	5
High-level output voltage	VOH	1.9			V	VI = VIH or VIL, IOH = -20 µA, VCC = 2 V, TA = -55°C to 125°C	5
High-level output voltage	VOH	4.4			V	VI = VIH or VIL, IOH = -20 µA, VCC = 4.5 V, TA = -55°C to 125°C	5
High-level output voltage	VOH	5.9			V	VI = VIH or VIL, IOH = -20 µA, VCC = 6 V, TA = -55°C to 125°C	5
High-level output voltage	VOH	3.7			V	VI = VIH or VIL, IOH = -4 mA, VCC = 4.5 V, TA = -55°C to 125°C	5
High-level output voltage	VOH	5.2			V	VI = VIH or VIL, IOH = -5.2 mA, VCC = 6 V, TA = -55°C to 125°C	5
Low-level output voltage	VOL			0.1	V	VI = VIH or VIL, IOL = 20 µA, VCC = 2 V, TA = -55°C to 125°C	5
Low-level output voltage	VOL			0.4	V	VI = VIH or VIL, IOL = 4 mA, VCC = 4.5 V, TA = -55°C to 125°C	5
Input leakage current	II	-1		1	µA	VI = VCC or 0, VCC = 6 V, TA = -55°C to 125°C	5
Supply current	ICC			40	µA	VI = VCC or 0, IO = 0, VCC = 6 V, TA = -55°C to 125°C	5
Input capacitance	Ci			10	pF	VCC = 5 V, TA = -55°C to 125°C	5
Propagation delay A to Y	tpd			205	ns	CL = 50 pF, VCC = 2 V, TA = -55°C to 125°C	6
Propagation delay A to Y	tpd			41	ns	CL = 50 pF, VCC = 4.5 V, TA = -55°C to 125°C	6
Propagation delay A to Y	tpd			35	ns	CL = 50 pF, VCC = 6 V, TA = -55°C to 125°C	6
Propagation delay A to Y	tpd		11		ns	CL = 15 pF, VCC = 5 V, TA = 25°C	6
Transition time	tt			110	ns	CL = 50 pF, VCC = 2 V, TA = -55°C to 125°C	6
Transition time	tt			22	ns	CL = 50 pF, VCC = 4.5 V, TA = -55°C to 125°C	6
Transition time	tt			19	ns	CL = 50 pF, VCC = 6 V, TA = -55°C to 125°C	6
Power dissipation capacitance per gate	Cpd		20		pF	No load, VCC = 5 V	6
Junction-to-ambient thermal resistance	RθJA		69.3		°C/W	N (PDIP) 14 pins	5
Junction-to-case (top) thermal resistance	RθJC(top)		57.4		°C/W	N (PDIP) 14 pins	5
Junction-to-board thermal resistance	RθJB		49		°C/W	N (PDIP) 14 pins	5
Junction-to-top characterization parameter	ΨJT		37.4		°C/W	N (PDIP) 14 pins	5
Junction-to-board characterization parameter	ΨJB		48.8		°C/W	N (PDIP) 14 pins	5

CAD (KiCad official)

Symbol: CD74HC14EE4
Footprint: Package_DIP:DIP-14_W7.62mm
3D model: PDIP-14 (KiCad packages3D, STEP)
3D model files: cd74hc14ee4-etched.step / cd74hc14ee4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc14ee4.step / cd74hc14ee4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (26 pp, sha256 4c8ce90521f36940, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

CD74HC14EE4

Verified CD74HC14EE4

Verification log 1 record

3D Model

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