component
CD74HC11E
Public Made by Adomby adom
Texas Instruments Gates, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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CD74HC11E
Texas Instruments · Gates · PDIP-14
CD74HC11E from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input A of gate 1, a buffered CMOS input of the triple 3-input AND gate. |
| 2 | 1B | input | Input B of gate 1, a buffered CMOS input of the triple 3-input AND gate. |
| 3 | 2A | input | Input A of gate 2, a buffered CMOS input of the triple 3-input AND gate. |
| 4 | 2B | input | Input B of gate 2, a buffered CMOS input of the triple 3-input AND gate. |
| 5 | 2C | input | Input C of gate 2, a buffered CMOS input of the triple 3-input AND gate. |
| 6 | 2Y | output | Output of gate 2 of the triple 3-input AND gate. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 3Y | output | Output of gate 3 of the triple 3-input AND gate. |
| 9 | 3A | input | Input A of gate 3, a buffered CMOS input of the triple 3-input AND gate. |
| 10 | 3B | input | Input B of gate 3, a buffered CMOS input of the triple 3-input AND gate. |
| 11 | 3C | input | Input C of gate 3, a buffered CMOS input of the triple 3-input AND gate. |
| 12 | 1Y | output | Output of gate 1 of the triple 3-input AND gate. |
| 13 | 1C | input | Input C of gate 1, a buffered CMOS input of the triple 3-input AND gate. |
| 14 | VCC | power_in | Positive supply; 2V to 6V for HC types and 4.5V to 5.5V for HCT types. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| DC Input Diode Current | IIK | -20 | 20 | mA | For VI < -0.5V or VI > VCC + 0.5V | 3 | |
| DC Output Diode Current | IOK | -20 | 20 | mA | For VO < -0.5V or VO > VCC + 0.5V | 3 | |
| DC Output Source or Sink Current per Output Pin | IO | -25 | 25 | mA | For VO > -0.5V or VO < VCC + 0.5V | 3 | |
| DC VCC or Ground Current | ICC or IGND | -50 | 50 | mA | 3 | ||
| Temperature Range | TA | -55 | 125 | °C | 3 | ||
| Supply Voltage Range HC Types | VCC | 2 | 6 | V | HC Types | 3 | |
| Input Rise and Fall Time | 1000 | ns | VCC = 2V | 3 | |||
| Input Rise and Fall Time | 500 | ns | VCC = 4.5V | 3 | |||
| Input Rise and Fall Time | 400 | ns | VCC = 6V | 3 | |||
| Maximum Junction Temperature (Plastic Package) | 150 | °C | Plastic Package | 3 | |||
| Maximum Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Maximum Lead Temperature (Soldering 10s) | 300 | °C | Soldering 10s (SOIC - Lead Tips Only) | 3 | |||
| High Level Input Voltage | VIH | 1.5 | V | VCC = 2V, -55°C to 125°C | 3 | ||
| High Level Input Voltage | VIH | 3.15 | V | VCC = 4.5V, -55°C to 125°C | 3 | ||
| High Level Input Voltage | VIH | 4.2 | V | VCC = 6V, -55°C to 125°C | 3 | ||
| Low Level Input Voltage | VIL | 0.5 | V | VCC = 2V, -55°C to 125°C | 3 | ||
| Low Level Input Voltage | VIL | 1.35 | V | VCC = 4.5V, -55°C to 125°C | 3 | ||
| Low Level Input Voltage | VIL | 1.8 | V | VCC = 6V, -55°C to 125°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 1.9 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 2V, -55°C to 125°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 4.4 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 5.9 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 6V, -55°C to 125°C | 3 | ||
| High Level Output Voltage TTL Loads | VOH | 3.7 | V | VI = VIH or VIL, IO = -4mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| High Level Output Voltage TTL Loads | VOH | 5.2 | V | VI = VIH or VIL, IO = -5.2mA, VCC = 6V, -55°C to 125°C | 3 | ||
| Low Level Output Voltage CMOS Loads | VOL | 0.1 | V | VI = VIH or VIL, IO = 0.02mA, VCC = 2V, -55°C to 125°C | 3 | ||
| Low Level Output Voltage TTL Loads | VOL | 0.4 | V | VI = VIH or VIL, IO = 4mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| Input Leakage Current | II | -1 | 1 | µA | VI = VCC or GND, VCC = 6V, -55°C to 125°C | 3 | |
| Quiescent Device Current | ICC | 40 | µA | VI = VCC or GND, IO = 0, VCC = 6V, -55°C to 125°C | 4 | ||
| Propagation Delay Input to Output | tPLH, tPHL | 150 | ns | CL = 50pF, VCC = 2V, -55°C to 125°C | 4 | ||
| Propagation Delay Input to Output | tPLH, tPHL | 30 | ns | CL = 50pF, VCC = 4.5V, -55°C to 125°C | 4 | ||
| Propagation Delay Input to Output | tPLH, tPHL | 26 | ns | CL = 50pF, VCC = 6V, -55°C to 125°C | 4 | ||
| Transition Times | tTLH, tTHL | 110 | ns | CL = 50pF, VCC = 2V, -55°C to 125°C | 5 | ||
| Transition Times | tTLH, tTHL | 22 | ns | CL = 50pF, VCC = 4.5V, -55°C to 125°C | 5 | ||
| Transition Times | tTLH, tTHL | 19 | ns | CL = 50pF, VCC = 6V, -55°C to 125°C | 5 | ||
| Input Capacitance | CI | 10 | pF | CL = 50pF, -55°C to 125°C | 5 | ||
| Thermal Resistance θJA E (PDIP) Package | θJA | 80 | °C/W | Typical, Note 1, E (PDIP) Package | 3 |
CAD (KiCad official)
- Symbol:
CD74HC11E - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
cd74hc11e-etched.step/cd74hc11e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hc11e.step/cd74hc11e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
0bf8f11cbb11ebec, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).