# CD74HC112PWR

**Texas Instruments** · Flip Flops · TSSOP-16

CD74HC112PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLK | input | Clock input for flip-flop 1, changes state on the negative-going clock transition, with hysteresis on the input. |
| 2 | 1K | input | K data input for flip-flop 1, sampled on the falling clock edge. |
| 3 | 1J | input | J data input for flip-flop 1, sampled on the falling clock edge. |
| 4 | 1PRE | input | Active-low asynchronous set (preset) input for flip-flop 1. |
| 5 | 1Q | output | True output of flip-flop 1. |
| 6 | 1Q̅ | output | Complementary output of flip-flop 1. |
| 7 | 2Q̅ | output | Complementary output of flip-flop 2. |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | 2Q | output | True output of flip-flop 2. |
| 10 | 2PRE | input | Active-low asynchronous set (preset) input for flip-flop 2. |
| 11 | 2J | input | J data input for flip-flop 2, sampled on the falling clock edge. |
| 12 | 2K | input | K data input for flip-flop 2, sampled on the falling clock edge. |
| 13 | 2CLK | input | Clock input for flip-flop 2, changes state on the negative-going clock transition, with hysteresis on the input. |
| 14 | 2CLR | input | Active-low asynchronous reset (clear) input for flip-flop 2. |
| 15 | 1CLR | input | Active-low asynchronous reset (clear) input for flip-flop 1. |
| 16 | VCC | power_in | Supply voltage, 2 V to 6 V for HC types, with a 0.1-µF bypass capacitor recommended close to the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `CD74HC112PWR`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `cd74hc112pwr-etched.step` / `cd74hc112pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hc112pwr.step` / `cd74hc112pwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd74hc112.pdf) (27 pp, sha256 `3d487a00f105ce33`, retrieved 2026-10-03, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd74hc112pwr-datasheet.pdf)