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CD74HC112M96

Public Made by Adom

by adom

Texas Instruments Flip Flops, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

CD74HC112M96

Texas Instruments · Flip Flops · SOIC-16

CD74HC112M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CLK input Clock input for flip-flop 1; negative-edge triggered with input hysteresis; fMAX 30 MHz typ at VCC=4.5 V, 60 MHz typ at VCC=5 V (CL=15 pF); minimum pulse width 16 ns (VCC=4.5 V).
2 1K input K data input for flip-flop 1; buffered CMOS input; setup time 16 ns min, hold time 0 ns (VCC=4.5 V); VIH ≥ 3.15 V, VIL ≤ 1.35 V at VCC=4.5 V (HC type).
3 1J input J data input for flip-flop 1; buffered CMOS input; setup time 16 ns min, hold time 0 ns (VCC=4.5 V); VIH ≥ 3.15 V, VIL ≤ 1.35 V at VCC=4.5 V (HC type).
4 1PRE input Active-low asynchronous preset input for flip-flop 1; forces 1Q high independent of clock; minimum pulse width 16 ns (VCC=4.5 V); removal time to CLK 16 ns min.
5 1Q output True output of flip-flop 1; VOH ≥ 3.98 V at IOH=−4 mA, VOL ≤ 0.33 V at IOL=4 mA (VCC=4.5 V, 25°C); propagation delay from CLK 35 ns max (VCC=4.5 V).
6 1Q_N output Complement output of flip-flop 1; VOH ≥ 3.98 V at IOH=−4 mA, VOL ≤ 0.33 V at IOL=4 mA (VCC=4.5 V, 25°C); propagation delay from CLK 35 ns max (VCC=4.5 V).
7 2Q_N output Complement output of flip-flop 2; VOH ≥ 3.98 V at IOH=−4 mA, VOL ≤ 0.33 V at IOL=4 mA (VCC=4.5 V, 25°C); propagation delay from 2CLK 35 ns max (VCC=4.5 V).
8 GND power_in Ground reference; continuous current through GND pin ±50 mA absolute maximum.
9 2Q output True output of flip-flop 2; VOH ≥ 3.98 V at IOH=−4 mA, VOL ≤ 0.33 V at IOL=4 mA (VCC=4.5 V, 25°C); propagation delay from 2CLK 35 ns max (VCC=4.5 V).
10 2PRE input Active-low asynchronous preset input for flip-flop 2; forces 2Q high independent of clock; minimum pulse width 16 ns (VCC=4.5 V); removal time to 2CLK 16 ns min.
11 2J input J data input for flip-flop 2; buffered CMOS input; setup time 16 ns min, hold time 0 ns (VCC=4.5 V); VIH ≥ 3.15 V, VIL ≤ 1.35 V at VCC=4.5 V (HC type).
12 2K input K data input for flip-flop 2; buffered CMOS input; setup time 16 ns min, hold time 0 ns (VCC=4.5 V); VIH ≥ 3.15 V, VIL ≤ 1.35 V at VCC=4.5 V (HC type).
13 2CLK input Clock input for flip-flop 2; negative-edge triggered with input hysteresis; fMAX 30 MHz typ at VCC=4.5 V, 60 MHz typ at VCC=5 V (CL=15 pF); minimum pulse width 16 ns (VCC=4.5 V).
14 2CLR input Active-low asynchronous clear input for flip-flop 2; forces 2Q low independent of clock; minimum pulse width 16 ns (VCC=4.5 V); removal time to 2CLK 16 ns min.
15 1CLR input Active-low asynchronous clear input for flip-flop 1; forces 1Q low independent of clock; minimum pulse width 16 ns (VCC=4.5 V); removal time to 1CLK 16 ns min.
16 VCC power_in Positive supply voltage; HC types 2 V to 6 V, HCT types 4.5 V to 5.5 V; absolute maximum 7 V; continuous current ±50 mA absolute maximum.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD74HC112M96
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hc112m96-etched.step / cd74hc112m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc112m96.step / cd74hc112m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 378985f635dcc264, retrieved 2026-09-26, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-4-6 (text+vision), consensus claude-opus-4-7 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF