component
CD74HC109M96
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+14−11@@ -65,7 +65,7 @@ "number": "3", "name": "~{1K}", "type": "input",- "description": "Active-low K input (K\u0304) for flip-flop 1; per truth table a low level is treated as K=H (enabling toggle or reset); tSU = 16 ns min at VCC = 4.5 V."+ "description": "Active-low K input (K̄) for flip-flop 1; per truth table a low level is treated as K=H (enabling toggle or reset); tSU = 16 ns min at VCC = 4.5 V." }, { "number": "4",@@ -77,37 +77,37 @@ "number": "5", "name": "~{1S}", "type": "input",- "description": "Active-low asynchronous set input for flip-flop 1; driving low forces 1Q high and ~{1Q} low regardless of clock state; tPLH to Q \u2264 24 ns max at VCC = 4.5 V."+ "description": "Active-low asynchronous set input for flip-flop 1; driving low forces 1Q high and ~{1Q} low regardless of clock state; tPLH to Q ≤ 24 ns max at VCC = 4.5 V." }, { "number": "6", "name": "1Q", "type": "output",- "description": "True Q output for flip-flop 1; VOH \u2265 4.4 V at VCC = 4.5 V with IO = \u22120.02 mA; tPHL from CP \u2264 44 ns max at VCC = 4.5 V."+ "description": "True Q output for flip-flop 1; VOH ≥ 4.4 V at VCC = 4.5 V with IO = −0.02 mA; tPHL from CP ≤ 44 ns max at VCC = 4.5 V." }, { "number": "7", "name": "~{1Q}", "type": "output",- "description": "Complement Q output for flip-flop 1; VOL \u2264 0.1 V at VCC = 4.5 V with IO = 0.02 mA; transitions complement to 1Q."+ "description": "Complement Q output for flip-flop 1; VOL ≤ 0.1 V at VCC = 4.5 V with IO = 0.02 mA; transitions complement to 1Q." }, { "number": "8", "name": "GND", "type": "power_in",- "description": "Ground supply reference; maximum ICC = \u00b150 mA; 0 V reference for all logic levels."+ "description": "Ground supply reference; maximum ICC = ±50 mA; 0 V reference for all logic levels." }, { "number": "9", "name": "~{2Q}", "type": "output",- "description": "Complement Q output for flip-flop 2; VOL \u2264 0.1 V at VCC = 4.5 V with IO = 0.02 mA; transitions complement to 2Q."+ "description": "Complement Q output for flip-flop 2; VOL ≤ 0.1 V at VCC = 4.5 V with IO = 0.02 mA; transitions complement to 2Q." }, { "number": "10", "name": "2Q", "type": "output",- "description": "True Q output for flip-flop 2; VOH \u2265 4.4 V at VCC = 4.5 V with IO = \u22120.02 mA; tPHL from 2CP \u2264 44 ns max at VCC = 4.5 V."+ "description": "True Q output for flip-flop 2; VOH ≥ 4.4 V at VCC = 4.5 V with IO = −0.02 mA; tPHL from 2CP ≤ 44 ns max at VCC = 4.5 V." }, { "number": "11",@@ -125,7 +125,7 @@ "number": "13", "name": "~{2K}", "type": "input",- "description": "Active-low K input (K\u0304) for flip-flop 2; per truth table a low level is treated as K=H; tSU = 16 ns min at VCC = 4.5 V."+ "description": "Active-low K input (K̄) for flip-flop 2; per truth table a low level is treated as K=H; tSU = 16 ns min at VCC = 4.5 V." }, { "number": "14",@@ -137,13 +137,13 @@ "number": "15", "name": "~{2R}", "type": "input",- "description": "Active-low asynchronous reset input for flip-flop 2; driving low forces 2Q low and ~{2Q} high regardless of clock state; tPHL to Q \u2264 46 ns max at VCC = 4.5 V."+ "description": "Active-low asynchronous reset input for flip-flop 2; driving low forces 2Q low and ~{2Q} high regardless of clock state; tPHL to Q ≤ 46 ns max at VCC = 4.5 V." }, { "number": "16", "name": "VCC", "type": "power_in",- "description": "Positive supply voltage; 2 V to 6 V (HC type) or 4.5 V to 5.5 V (HCT type); quiescent ICC \u2264 40 \u00b5A at VCC = 6 V, 85 \u00b0C."+ "description": "Positive supply voltage; 2 V to 6 V (HC type) or 4.5 V to 5.5 V (HCT type); quiescent ICC ≤ 40 µA at VCC = 6 V, 85 °C." } ], "provenance": {@@ -221,5 +221,8 @@ "docs/cd74hc109m96-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }