component

CD74HC08E

Public Made by Adom

by adom

Texas Instruments Gates, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icscd74hc08efactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
cd74hc08e / README.md
History Download
Ray Publish 0.1.0 718f69e 3d ago

CD74HC08E

Texas Instruments · Gates · PDIP-14

CD74HC08E from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input channel 1, input A of the first 2-input AND gate, a high-impedance standard CMOS input whose edges must be fast to avoid excess current and oscillation.
2 1B input Input channel 1, input B of the first 2-input AND gate, a high-impedance standard CMOS input whose edges must be fast to avoid excess current and oscillation.
3 1Y output Output channel 1, output Y of the first AND gate, a balanced CMOS push-pull output implementing Y = A AND B.
4 2A input Input channel 2, input A of the second 2-input AND gate, a high-impedance standard CMOS input whose edges must be fast to avoid excess current and oscillation.
5 2B input Input channel 2, input B of the second 2-input AND gate, a high-impedance standard CMOS input whose edges must be fast to avoid excess current and oscillation.
6 2Y output Output channel 2, output Y of the second AND gate, a balanced CMOS push-pull output implementing Y = A AND B.
7 GND power_in Ground reference for the device, which must not be exceeded by the continuous current limit of ±50 mA through VCC or GND.
8 3Y output Output channel 3, output Y of the third AND gate, a balanced CMOS push-pull output implementing Y = A AND B.
9 3A input Input channel 3, input A of the third 2-input AND gate, a high-impedance standard CMOS input whose edges must be fast to avoid excess current and oscillation.
10 3B input Input channel 3, input B of the third 2-input AND gate, a high-impedance standard CMOS input whose edges must be fast to avoid excess current and oscillation.
11 4Y output Output channel 4, output Y of the fourth AND gate, a balanced CMOS push-pull output implementing Y = A AND B.
12 4A input Input channel 4, input A of the fourth 2-input AND gate, a high-impedance standard CMOS input whose edges must be fast to avoid excess current and oscillation.
13 4B input Input channel 4, input B of the fourth 2-input AND gate, a high-impedance standard CMOS input whose edges must be fast to avoid excess current and oscillation.
14 VCC power_in Positive supply, specified from 2 V to 6 V in the Recommended Operating Conditions, with a 0.1-μF bypass capacitor recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category Logic ICs
Pins 14

CAD (KiCad official)

  • Symbol: CD74HC08E
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: cd74hc08e-etched.step / cd74hc08e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc08e.step / cd74hc08e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 f3de35dcac4ee479, retrieved 2026-10-28, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF