component
CD74ACT573E
Public Made by Adomby adom
Texas Instruments Latches, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD74ACT573E
Texas Instruments · Latches · PDIP-20
CD74ACT573E from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Active-low output enable; HIGH puts the 3-state outputs in high impedance, and latch operation is independent of it. |
| 2 | D0 | input | Data input 0 to the transparent latch. |
| 3 | D1 | input | Data input 1 to the transparent latch. |
| 4 | D2 | input | Data input 2 to the transparent latch. |
| 5 | D3 | input | Data input 3 to the transparent latch. |
| 6 | D4 | input | Data input 4 to the transparent latch. |
| 7 | D5 | input | Data input 5 to the transparent latch. |
| 8 | D6 | input | Data input 6 to the transparent latch. |
| 9 | D7 | input | Data input 7 to the transparent latch. |
| 10 | GND | power_in | Ground; supply return, with all voltages referenced to ground. |
| 11 | LE | input | Latch enable; outputs follow inputs when HIGH and data is latched when it goes LOW. |
| 12 | Q7 | tri_state | Non-inverting 3-state latch output 7 with ±24 mA drive. |
| 13 | Q6 | tri_state | Non-inverting 3-state latch output 6 with ±24 mA drive. |
| 14 | Q5 | tri_state | Non-inverting 3-state latch output 5 with ±24 mA drive. |
| 15 | Q4 | tri_state | Non-inverting 3-state latch output 4 with ±24 mA drive. |
| 16 | Q3 | tri_state | Non-inverting 3-state latch output 3 with ±24 mA drive. |
| 17 | Q2 | tri_state | Non-inverting 3-state latch output 2 with ±24 mA drive. |
| 18 | Q1 | tri_state | Non-inverting 3-state latch output 1 with ±24 mA drive. |
| 19 | Q0 | tri_state | Non-inverting 3-state latch output 0 with ±24 mA drive. |
| 20 | VCC | power_in | Positive supply; 4.5 V to 5.5 V recommended for ACT types, absolute maximum -0.5 to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Logic ICs |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
CD74ACT573E - Footprint:
Package_DIP:DIP-20_W7.62mm - 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files:
cd74act573e-etched.step/cd74act573e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74act573e.step/cd74act573e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (18 pp, sha256
640a9d1deb2bb5be, retrieved 2026-10-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD74ACT573E
**Texas Instruments** · Latches · PDIP-20
CD74ACT573E from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Active-low output enable; HIGH puts the 3-state outputs in high impedance, and latch operation is independent of it. |
| 2 | D0 | input | Data input 0 to the transparent latch. |
| 3 | D1 | input | Data input 1 to the transparent latch. |
| 4 | D2 | input | Data input 2 to the transparent latch. |
| 5 | D3 | input | Data input 3 to the transparent latch. |
| 6 | D4 | input | Data input 4 to the transparent latch. |
| 7 | D5 | input | Data input 5 to the transparent latch. |
| 8 | D6 | input | Data input 6 to the transparent latch. |
| 9 | D7 | input | Data input 7 to the transparent latch. |
| 10 | GND | power_in | Ground; supply return, with all voltages referenced to ground. |
| 11 | LE | input | Latch enable; outputs follow inputs when HIGH and data is latched when it goes LOW. |
| 12 | Q7 | tri_state | Non-inverting 3-state latch output 7 with ±24 mA drive. |
| 13 | Q6 | tri_state | Non-inverting 3-state latch output 6 with ±24 mA drive. |
| 14 | Q5 | tri_state | Non-inverting 3-state latch output 5 with ±24 mA drive. |
| 15 | Q4 | tri_state | Non-inverting 3-state latch output 4 with ±24 mA drive. |
| 16 | Q3 | tri_state | Non-inverting 3-state latch output 3 with ±24 mA drive. |
| 17 | Q2 | tri_state | Non-inverting 3-state latch output 2 with ±24 mA drive. |
| 18 | Q1 | tri_state | Non-inverting 3-state latch output 1 with ±24 mA drive. |
| 19 | Q0 | tri_state | Non-inverting 3-state latch output 0 with ±24 mA drive. |
| 20 | VCC | power_in | Positive supply; 4.5 V to 5.5 V recommended for ACT types, absolute maximum -0.5 to 6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Logic ICs |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `CD74ACT573E`
- Footprint: `Package_DIP:DIP-20_W7.62mm`
- 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files: `cd74act573e-etched.step` / `cd74act573e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74act573e.step` / `cd74act573e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](docs/cd74act573e-datasheet.pdf) (18 pp, sha256 `640a9d1deb2bb5be`, retrieved 2026-10-24, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd74act573e-datasheet.pdf)