component
CD74ACT540M96
Public Made by Adomby adom
Texas Instruments Buffers / Drivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD74ACT540M96
Texas Instruments · Buffers / Drivers · SOIC-20-300mil
CD74ACT540M96 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-LOW output enable 1; outputs are high-impedance when either OE1 or OE2 is HIGH. |
| 2 | A0 | input | Buffered data input 0, inverted to output Y0. |
| 3 | A1 | input | Buffered data input 1, inverted to output Y1. |
| 4 | A2 | input | Buffered data input 2, inverted to output Y2. |
| 5 | A3 | input | Buffered data input 3, inverted to output Y3. |
| 6 | A4 | input | Buffered data input 4, inverted to output Y4. |
| 7 | A5 | input | Buffered data input 5, inverted to output Y5. |
| 8 | A6 | input | Buffered data input 6, inverted to output Y6. |
| 9 | A7 | input | Buffered data input 7, inverted to output Y7. |
| 10 | GND | power_in | Ground. |
| 11 | Y7 | tri_state | Inverting 3-state output 7 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 12 | Y6 | tri_state | Inverting 3-state output 6 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 13 | Y5 | tri_state | Inverting 3-state output 5 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 14 | Y4 | tri_state | Inverting 3-state output 4 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 15 | Y3 | tri_state | Inverting 3-state output 3 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 16 | Y2 | tri_state | Inverting 3-state output 2 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 17 | Y1 | tri_state | Inverting 3-state output 1 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 18 | Y0 | tri_state | Inverting 3-state output 0 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 19 | OE2 | input | Active-LOW output enable 2; outputs are high-impedance when either OE1 or OE2 is HIGH. |
| 20 | VCC | power_in | Positive supply voltage; absolute maximum -0.5 to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage | VCC | -0.5 | 6 | V | 2 | ||
| DC input diode current | IIK | -20 | 20 | mA | for VI < -0.5 or VI > VCC + 0.5 V | 2 | |
| DC output diode current | IOK | -50 | 50 | mA | for VO < -0.5 or VO > VCC + 0.5 V | 2 | |
| DC output source or sink current per output pin | IO | -50 | 50 | mA | for VO > -0.5 or VO < VCC + 0.5 V | 2 | |
| DC VCC or ground current | ICC or IGND | -100 | 100 | mA | For up to 4 outputs per device: add ±25 mA for each additional output | 2 | |
| Storage temperature | Tstg | -65 | 150 | °C | 2 | ||
| Lead temperature during soldering | 265 | °C | At distance 1/16 ± 1/32 in. (1.59 ± 0.79 mm) from case for 10 s maximum | 2 | |||
| Lead temperature during soldering (board inserted) | 300 | °C | Unit inserted into PC board min. thickness 1/16 in. (1.59 mm) with solder contacting lead tips only | 2 | |||
| Package thermal impedance, M package | θJA | 58 | °C/W | M package; calculated per JESD 51 | 2 | ||
| Operating temperature | -55 | 125 | °C | Extended Industrial/Military range; Industrial is -40 to +85 | 1 |
CAD (KiCad official)
- Symbol:
CD74ACT540M96 - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
cd74act540m96-etched.step/cd74act540m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74act540m96.step/cd74act540m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
57ab4e4ba5bb3562, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD74ACT540M96
**Texas Instruments** · Buffers / Drivers · SOIC-20-300mil
CD74ACT540M96 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-LOW output enable 1; outputs are high-impedance when either OE1 or OE2 is HIGH. |
| 2 | A0 | input | Buffered data input 0, inverted to output Y0. |
| 3 | A1 | input | Buffered data input 1, inverted to output Y1. |
| 4 | A2 | input | Buffered data input 2, inverted to output Y2. |
| 5 | A3 | input | Buffered data input 3, inverted to output Y3. |
| 6 | A4 | input | Buffered data input 4, inverted to output Y4. |
| 7 | A5 | input | Buffered data input 5, inverted to output Y5. |
| 8 | A6 | input | Buffered data input 6, inverted to output Y6. |
| 9 | A7 | input | Buffered data input 7, inverted to output Y7. |
| 10 | GND | power_in | Ground. |
| 11 | Y7 | tri_state | Inverting 3-state output 7 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 12 | Y6 | tri_state | Inverting 3-state output 6 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 13 | Y5 | tri_state | Inverting 3-state output 5 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 14 | Y4 | tri_state | Inverting 3-state output 4 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 15 | Y3 | tri_state | Inverting 3-state output 3 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 16 | Y2 | tri_state | Inverting 3-state output 2 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 17 | Y1 | tri_state | Inverting 3-state output 1 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 18 | Y0 | tri_state | Inverting 3-state output 0 (±24 mA drive), high-impedance when an output enable is HIGH. |
| 19 | OE2 | input | Active-LOW output enable 2; outputs are high-impedance when either OE1 or OE2 is HIGH. |
| 20 | VCC | power_in | Positive supply voltage; absolute maximum -0.5 to 6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic ICs |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage | VCC | -0.5 | | 6 | V | | 2 |
| DC input diode current | IIK | -20 | | 20 | mA | for VI < -0.5 or VI > VCC + 0.5 V | 2 |
| DC output diode current | IOK | -50 | | 50 | mA | for VO < -0.5 or VO > VCC + 0.5 V | 2 |
| DC output source or sink current per output pin | IO | -50 | | 50 | mA | for VO > -0.5 or VO < VCC + 0.5 V | 2 |
| DC VCC or ground current | ICC or IGND | -100 | | 100 | mA | For up to 4 outputs per device: add ±25 mA for each additional output | 2 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 2 |
| Lead temperature during soldering | | | | 265 | °C | At distance 1/16 ± 1/32 in. (1.59 ± 0.79 mm) from case for 10 s maximum | 2 |
| Lead temperature during soldering (board inserted) | | | | 300 | °C | Unit inserted into PC board min. thickness 1/16 in. (1.59 mm) with solder contacting lead tips only | 2 |
| Package thermal impedance, M package | θJA | | 58 | | °C/W | M package; calculated per JESD 51 | 2 |
| Operating temperature | | -55 | | 125 | °C | Extended Industrial/Military range; Industrial is -40 to +85 | 1 |
## CAD (KiCad official)
- Symbol: `CD74ACT540M96`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `cd74act540m96-etched.step` / `cd74act540m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74act540m96.step` / `cd74act540m96.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd74act540m96.pdf) (20 pp, sha256 `57ab4e4ba5bb3562`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd74act540m96-datasheet.pdf)