CD74ACT299M96

{
  "slug": "cd74act299m96",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Shift Registers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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    "logic",
    "cd74act299m96",
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    "cd74act299m96.step",
    "cd74act299m96.lbr",
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    "docs/cd74act299m96-datasheet.pdf",
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  "component": {
    "mpn": "CD74ACT299M96",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-20-300mil",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/cd74ac323",
    "parts": {
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      "lbr": "cd74act299m96.lbr"
    },
    "distributor_links": {
      "lcsc": "C2878443",
      "digikey": "296-28471-2-ND",
      "mouser": "595-CD74ACT299M96"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T20:41:25Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-28471-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-CD74ACT299M96",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "S0",
        "type": "input",
        "description": "Mode select 0; together with S1 selects hold, shift right, shift left or parallel load, and when S0 and S1 are both high the I/O pins are high-impedance inputs."
      },
      {
        "number": "2",
        "name": "!OE1",
        "type": "input",
        "description": "Active-low output enable 1; when high the I/O terminals are forced to the off (high-impedance) state."
      },
      {
        "number": "3",
        "name": "!OE2",
        "type": "input",
        "description": "Active-low output enable 2; when high the I/O terminals are forced to the off (high-impedance) state."
      },
      {
        "number": "4",
        "name": "I/O6",
        "type": "bidirectional",
        "description": "Parallel data input/output 6, a three-state output and CMOS-buffered input."
      },
      {
        "number": "5",
        "name": "I/O4",
        "type": "bidirectional",
        "description": "Parallel data input/output 4, a three-state output and CMOS-buffered input."
      },
      {
        "number": "6",
        "name": "I/O2",
        "type": "bidirectional",
        "description": "Parallel data input/output 2, a three-state output and CMOS-buffered input."
      },
      {
        "number": "7",
        "name": "I/O0",
        "type": "bidirectional",
        "description": "Parallel data input/output 0, a three-state output and CMOS-buffered input."
      },
      {
        "number": "8",
        "name": "Q0",
        "type": "output",
        "description": "Serial output from the first register stage, used for cascading to the DS7 input of the previous register."
      },
      {
        "number": "9",
        "name": "!MR",
        "type": "input",
        "description": "Master reset, active low; on the 299 it asynchronously clears the register regardless of all other inputs."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "11",
        "name": "DS0",
        "type": "input",
        "description": "Serial data input for right shift, sampled on the low-to-high transition of CP."
      },
      {
        "number": "12",
        "name": "CP",
        "type": "input",
        "description": "Clock input, rising-edge triggered; mode select, serial data and parallel data respond only to its low-to-high transition."
      },
      {
        "number": "13",
        "name": "I/O1",
        "type": "bidirectional",
        "description": "Parallel data input/output 1, a three-state output and CMOS-buffered input."
      },
      {
        "number": "14",
        "name": "I/O3",
        "type": "bidirectional",
        "description": "Parallel data input/output 3, a three-state output and CMOS-buffered input."
      },
      {
        "number": "15",
        "name": "I/O5",
        "type": "bidirectional",
        "description": "Parallel data input/output 5, a three-state output and CMOS-buffered input."
      },
      {
        "number": "16",
        "name": "I/O7",
        "type": "bidirectional",
        "description": "Parallel data input/output 7, a three-state output and CMOS-buffered input."
      },
      {
        "number": "17",
        "name": "Q7",
        "type": "output",
        "description": "Serial output from the last register stage, used for cascading to the DS0 input of the next register."
      },
      {
        "number": "18",
        "name": "DS7",
        "type": "input",
        "description": "Serial data input for left shift, sampled on the low-to-high transition of CP."
      },
      {
        "number": "19",
        "name": "S1",
        "type": "input",
        "description": "Mode select 1; together with S0 selects hold, shift right, shift left or parallel load."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply; 4.5 V to 5.5 V recommended for ACT types, with a 0.1 µF bypass capacitor placed close to the pin."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 4, 5, 6, 7, 13, 14, 15, 16 are printed as type 'O' in the pin function table, but the table foot; Pin 1 is printed as 'SO' in the pin table; the functional description and mode table use 'S0'. Recor; Pin 11 is printed as 'DSO' in the pin table while the functional table uses 'DS0'. Recorded as DSO p"
        ],
        "pages_sent": 25,
        "cost_usd": 0.0944,
        "at": "2026-10-11T20:41:06"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/cd74ac323",
        "pages": 25,
        "sha256": "fbcafb13deed4fbf",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
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        "checked": "2026-10-11",
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}