component
CD74ACT240M96
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD74ACT240M96
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20
CD74ACT240M96 from Texas Instruments, in a SOIC-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Bank 1 output enable, active low; when high, outputs 1Y0 to 1Y3 are forced to high impedance (Z). |
| 2 | 1A0 | input | Bank 1 channel 1 data input to the buffer. |
| 3 | 2Y3 | output | Bank 2 channel 4 3-state buffer output. |
| 4 | 1A1 | input | Bank 1 channel 2 data input to the buffer. |
| 5 | 2Y2 | output | Bank 2 channel 3 3-state buffer output. |
| 6 | 1A2 | input | Bank 1 channel 3 data input to the buffer. |
| 7 | 2Y1 | output | Bank 2 channel 2 3-state buffer output. |
| 8 | 1A3 | input | Bank 1 channel 4 data input to the buffer. |
| 9 | 2Y0 | output | Bank 2 channel 1 3-state buffer output. |
| 10 | GND | power_in | Ground reference for the device; all voltages are referenced to ground. |
| 11 | 2A0 | input | Bank 2 channel 1 data input to the buffer. |
| 12 | 1Y3 | output | Bank 1 channel 4 3-state buffer output. |
| 13 | 2A1 | input | Bank 2 channel 2 data input to the buffer. |
| 14 | 1Y2 | output | Bank 1 channel 3 3-state buffer output. |
| 15 | 2A2 | input | Bank 2 channel 3 data input to the buffer. |
| 16 | 1Y1 | output | Bank 1 channel 2 3-state buffer output. |
| 17 | 2A3 | input | Bank 2 channel 4 data input to the buffer. |
| 18 | 1Y0 | output | Bank 1 channel 1 3-state buffer output. |
| 19 | 2OE | input | Bank 2 output enable, active low; when high, outputs 2Y0 to 2Y3 are forced to high impedance (Z). |
| 20 | VCC | power_in | Positive supply; ACT types are specified for 4.5 V to 5.5 V operation (Section 4.2). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
CD74ACT240M96 - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20 (KiCad packages3D, STEP)
- 3D model files:
cd74act240m96-etched.step/cd74act240m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74act240m96.step/cd74act240m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
9b6e0b913ceaad4a, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD74ACT240M96
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-20
CD74ACT240M96 from Texas Instruments, in a SOIC-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Bank 1 output enable, active low; when high, outputs 1Y0 to 1Y3 are forced to high impedance (Z). |
| 2 | 1A0 | input | Bank 1 channel 1 data input to the buffer. |
| 3 | 2Y3 | output | Bank 2 channel 4 3-state buffer output. |
| 4 | 1A1 | input | Bank 1 channel 2 data input to the buffer. |
| 5 | 2Y2 | output | Bank 2 channel 3 3-state buffer output. |
| 6 | 1A2 | input | Bank 1 channel 3 data input to the buffer. |
| 7 | 2Y1 | output | Bank 2 channel 2 3-state buffer output. |
| 8 | 1A3 | input | Bank 1 channel 4 data input to the buffer. |
| 9 | 2Y0 | output | Bank 2 channel 1 3-state buffer output. |
| 10 | GND | power_in | Ground reference for the device; all voltages are referenced to ground. |
| 11 | 2A0 | input | Bank 2 channel 1 data input to the buffer. |
| 12 | 1Y3 | output | Bank 1 channel 4 3-state buffer output. |
| 13 | 2A1 | input | Bank 2 channel 2 data input to the buffer. |
| 14 | 1Y2 | output | Bank 1 channel 3 3-state buffer output. |
| 15 | 2A2 | input | Bank 2 channel 3 data input to the buffer. |
| 16 | 1Y1 | output | Bank 1 channel 2 3-state buffer output. |
| 17 | 2A3 | input | Bank 2 channel 4 data input to the buffer. |
| 18 | 1Y0 | output | Bank 1 channel 1 3-state buffer output. |
| 19 | 2OE | input | Bank 2 output enable, active low; when high, outputs 2Y0 to 2Y3 are forced to high impedance (Z). |
| 20 | VCC | power_in | Positive supply; ACT types are specified for 4.5 V to 5.5 V operation (Section 4.2). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20 |
| Category | Logic |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `CD74ACT240M96`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20 (KiCad packages3D, STEP)
- 3D model files: `cd74act240m96-etched.step` / `cd74act240m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74act240m96.step` / `cd74act240m96.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74act240) (28 pp, sha256 `9b6e0b913ceaad4a`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd74act240m96-datasheet.pdf)