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Initial commit: component/cd74act109m96

Ray ·57c99ed387 ·
2 files changed +241
README.mdadded+52
@@ -0,0 +1,52 @@+# CD74ACT109M96++**Texas Instruments** · Flip Flops · SOIC-16++CD74ACT109M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1CLR | input | Active-low clear input for flip-flop 1; resets Q to 0 V and Q̄ to VCC independent of all other inputs. |+| 2 | 1J | input | J data input for flip-flop 1; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C. |+| 3 | 1K | input | K data input for flip-flop 1; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C. |+| 4 | 1CLK | input | Positive-edge-triggered clock input for flip-flop 1; transfers J-K state on rising edge with minimum pulse width 5 ns. |+| 5 | 1PRE | input | Active-low preset input for flip-flop 1; sets Q to VCC and Q̄ to 0 V independent of all other inputs. |+| 6 | 1Q | output | Q output for flip-flop 1 (true state); totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC. |+| 7 | 1Q̄ | output | Inverted Q output for flip-flop 1; totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC. |+| 8 | GND | power_in | Ground; 0 V reference and negative power supply pin. |+| 9 | 2Q̄ | output | Inverted Q output for flip-flop 2; totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC. |+| 10 | 2Q | output | Q output for flip-flop 2 (true state); totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC. |+| 11 | 2PRE | input | Active-low preset input for flip-flop 2; sets Q to VCC and Q̄ to 0 V independent of all other inputs. |+| 12 | 2CLK | input | Positive-edge-triggered clock input for flip-flop 2; transfers J-K state on rising edge with minimum pulse width 5 ns. |+| 13 | 2K | input | K data input for flip-flop 2; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C. |+| 14 | 2J | input | J data input for flip-flop 2; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C. |+| 15 | 2CLR | input | Active-low clear input for flip-flop 2; resets Q to 0 V and Q̄ to VCC independent of all other inputs. |+| 16 | VCC | power_in | Power supply pin; connect to 4.5 V to 5.5 V nominal 5 V with maximum continuous current ±100 mA through package. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74ACT109M96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd74act109m96-etched.step` / `cd74act109m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74act109m96.step` / `cd74act109m96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74act109) (14 pp, sha256 `99f24a412a6a92e0`, retrieved 2026-09-23, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74act109m96-datasheet.pdf)
page.jsonadded+189
@@ -0,0 +1,189 @@+{+  "slug": "cd74act109m96",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Flip Flops, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "cd74act109m96",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd74act109m96.kicad_sym",+    "cd74act109m96.kicad_mod",+    "cd74act109m96.glb",+    "cd74act109m96.step",+    "cd74act109m96.lbr",+    "docs/hero.png",+    "docs/cd74act109m96-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "CD74ACT109M96",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Logic",+    "subcategory": "Flip Flops",+    "datasheet": "https://www.ti.com/cn/lit/gpn/cd74act109",+    "parts": {+      "symbol": "cd74act109m96.kicad_sym",+      "footprint": "cd74act109m96.kicad_mod",+      "model_3d": "cd74act109m96-etched.glb",+      "model_3d_plain": "cd74act109m96.glb",+      "model_3d_step": "cd74act109m96-etched.step",+      "model_3d_step_plain": "cd74act109m96.step",+      "lbr": "cd74act109m96.lbr"+    },+    "distributor_links": {+      "lcsc": "C2677772"+    },+    "pins": [+      {+        "number": "1",+        "name": "1CLR",+        "type": "input",+        "description": "Active-low clear input for flip-flop 1; resets Q to 0 V and Q̄ to VCC independent of all other inputs."+      },+      {+        "number": "2",+        "name": "1J",+        "type": "input",+        "description": "J data input for flip-flop 1; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C."+      },+      {+        "number": "3",+        "name": "1K",+        "type": "input",+        "description": "K data input for flip-flop 1; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C."+      },+      {+        "number": "4",+        "name": "1CLK",+        "type": "input",+        "description": "Positive-edge-triggered clock input for flip-flop 1; transfers J-K state on rising edge with minimum pulse width 5 ns."+      },+      {+        "number": "5",+        "name": "1PRE",+        "type": "input",+        "description": "Active-low preset input for flip-flop 1; sets Q to VCC and Q̄ to 0 V independent of all other inputs."+      },+      {+        "number": "6",+        "name": "1Q",+        "type": "output",+        "description": "Q output for flip-flop 1 (true state); totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC."+      },+      {+        "number": "7",+        "name": "1Q̄",+        "type": "output",+        "description": "Inverted Q output for flip-flop 1; totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground; 0 V reference and negative power supply pin."+      },+      {+        "number": "9",+        "name": "2Q̄",+        "type": "output",+        "description": "Inverted Q output for flip-flop 2; totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC."+      },+      {+        "number": "10",+        "name": "2Q",+        "type": "output",+        "description": "Q output for flip-flop 2 (true state); totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC."+      },+      {+        "number": "11",+        "name": "2PRE",+        "type": "input",+        "description": "Active-low preset input for flip-flop 2; sets Q to VCC and Q̄ to 0 V independent of all other inputs."+      },+      {+        "number": "12",+        "name": "2CLK",+        "type": "input",+        "description": "Positive-edge-triggered clock input for flip-flop 2; transfers J-K state on rising edge with minimum pulse width 5 ns."+      },+      {+        "number": "13",+        "name": "2K",+        "type": "input",+        "description": "K data input for flip-flop 2; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C."+      },+      {+        "number": "14",+        "name": "2J",+        "type": "input",+        "description": "J data input for flip-flop 2; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C."+      },+      {+        "number": "15",+        "name": "2CLR",+        "type": "input",+        "description": "Active-low clear input for flip-flop 2; resets Q to 0 V and Q̄ to VCC independent of all other inputs."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Power supply pin; connect to 4.5 V to 5.5 V nominal 5 V with maximum continuous current ±100 mA through package."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 14,+        "cost_usd": 0.1908,+        "at": "2026-09-23T21:52:20"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/cd74act109",+        "pages": 14,+        "sha256": "99f24a412a6a92e0",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file