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CD74ACT109M96

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by adom

Texas Instruments Flip Flops, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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CD74ACT109M96

Texas Instruments · Flip Flops · SOIC-16

CD74ACT109M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CLR input Active-low clear input for flip-flop 1; resets Q to 0 V and Q̄ to VCC independent of all other inputs.
2 1J input J data input for flip-flop 1; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C.
3 1K input K data input for flip-flop 1; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C.
4 1CLK input Positive-edge-triggered clock input for flip-flop 1; transfers J-K state on rising edge with minimum pulse width 5 ns.
5 1PRE input Active-low preset input for flip-flop 1; sets Q to VCC and Q̄ to 0 V independent of all other inputs.
6 1Q output Q output for flip-flop 1 (true state); totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC.
7 1Q̄ output Inverted Q output for flip-flop 1; totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC.
8 GND power_in Ground; 0 V reference and negative power supply pin.
9 2Q̄ output Inverted Q output for flip-flop 2; totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC.
10 2Q output Q output for flip-flop 2 (true state); totem-pole output with ±24 mA drive capability and voltage swing 0 to VCC.
11 2PRE input Active-low preset input for flip-flop 2; sets Q to VCC and Q̄ to 0 V independent of all other inputs.
12 2CLK input Positive-edge-triggered clock input for flip-flop 2; transfers J-K state on rising edge with minimum pulse width 5 ns.
13 2K input K data input for flip-flop 2; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C.
14 2J input J data input for flip-flop 2; sampled on positive clock edge with setup time minimum 5.5 ns at −55°C to 125°C.
15 2CLR input Active-low clear input for flip-flop 2; resets Q to 0 V and Q̄ to VCC independent of all other inputs.
16 VCC power_in Power supply pin; connect to 4.5 V to 5.5 V nominal 5 V with maximum continuous current ±100 mA through package.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD74ACT109M96
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cd74act109m96-etched.step / cd74act109m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74act109m96.step / cd74act109m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (14 pp, sha256 99f24a412a6a92e0, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF