Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

CD74ACT05E

Texas Instruments · Inverters · PDIP-14

CD74ACT05E from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input of inverter 1, TTL-voltage compatible; unused inputs must be held at VCC or GND to ensure proper operation.
2 1Y output Open-drain output of inverter 1 that requires a pullup resistor to perform correctly.
3 2A input Input of inverter 2, TTL-voltage compatible; unused inputs must be held at VCC or GND to ensure proper operation.
4 2Y output Open-drain output of inverter 2 that requires a pullup resistor to perform correctly.
5 3A input Input of inverter 3, TTL-voltage compatible; unused inputs must be held at VCC or GND to ensure proper operation.
6 3Y output Open-drain output of inverter 3 that requires a pullup resistor to perform correctly.
7 GND power_in Ground reference for the device.
8 4Y output Open-drain output of inverter 4 that requires a pullup resistor to perform correctly.
9 4A input Input of inverter 4, TTL-voltage compatible; unused inputs must be held at VCC or GND to ensure proper operation.
10 5Y output Open-drain output of inverter 5 that requires a pullup resistor to perform correctly.
11 5A input Input of inverter 5, TTL-voltage compatible; unused inputs must be held at VCC or GND to ensure proper operation.
12 6Y output Open-drain output of inverter 6 that requires a pullup resistor to perform correctly.
13 6A input Input of inverter 6, TTL-voltage compatible; unused inputs must be held at VCC or GND to ensure proper operation.
14 VCC power_in Positive supply; recommended operating range 4.5 V to 5.5 V with an absolute maximum of 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category Logic ICs
Pins 14

CAD (KiCad official)

  • Symbol: CD74ACT05E
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: cd74act05e-etched.step / cd74act05e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74act05e.step / cd74act05e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 b819afd3de862c96, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF