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CD74AC283M96
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Texas Instruments Specialty Logic, SOIC-16. Pinout settled in review by an AI reviewer against the manufacturer's datasheet, KiCad symbol/footprint/3D.
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CD74AC283M96
Texas Instruments · Specialty Logic · SOIC-16
CD74AC283M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | output | Sum output bit 1. |
| 2 | B1 | input | Operand B bit 1. |
| 3 | A1 | input | Operand A bit 1. |
| 4 | S0 | output | Sum output bit 0. |
| 5 | A0 | input | Operand A bit 0. |
| 6 | B0 | input | Operand B bit 0. |
| 7 | CIN | input | Carry input; tie low when there is no carry-in (positive logic). |
| 8 | GND | power_in | Ground. |
| 9 | COUT | output | Carry output, high when the sum exceeds 15. |
| 10 | S3 | output | Sum output bit 3. |
| 11 | B3 | input | Operand B bit 3. |
| 12 | A3 | input | Operand A bit 3. |
| 13 | S2 | output | Sum output bit 2. |
| 14 | A2 | input | Operand A bit 2. |
| 15 | B2 | input | Operand B bit 2. |
| 16 | VCC | power_in | Supply, 1.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High Level Input Voltage | VIH | 1.2 | V | VCC=1.5 V; -55 to 125 °C column | 2 | ||
| High Level Input Voltage | VIH | 2.1 | V | VCC=3 V; -55 to 125 °C column | 2 | ||
| High Level Input Voltage | VIH | 3.85 | V | VCC=5.5 V; -55 to 125 °C column | 2 | ||
| Low Level Input Voltage | VIL | 0.3 | V | VCC=1.5 V; -55 to 125 °C column | 2 | ||
| Low Level Input Voltage | VIL | 0.9 | V | VCC=3 V; -55 to 125 °C column | 2 | ||
| Low Level Input Voltage | VIL | 1.65 | V | VCC=5.5 V; -55 to 125 °C column | 2 | ||
| High Level Output Voltage | VOH | 1.4 | V | IO=-0.05 mA; VI=VIH or VIL; VCC=1.5 V; -55 to 125 °C column | 2 | ||
| High Level Output Voltage | VOH | 2.9 | V | IO=-0.05 mA; VI=VIH or VIL; VCC=3 V; -55 to 125 °C column | 2 | ||
| High Level Output Voltage | VOH | 4.4 | V | IO=-0.05 mA; VI=VIH or VIL; VCC=4.5 V; -55 to 125 °C column | 2 | ||
| High Level Output Voltage | VOH | 2.4 | V | IO=-4 mA; VI=VIH or VIL; VCC=3 V; -55 to 125 °C column | 2 | ||
| High Level Output Voltage | VOH | 3.7 | V | IO=-24 mA; VI=VIH or VIL; VCC=4.5 V; -55 to 125 °C column | 2 | ||
| High Level Output Voltage | VOH | 3.85 | V | IO=-75 mA (Note 6, 7); VCC=5.5 V; -40 to 85 °C column | 2 | ||
| Low Level Output Voltage | VOL | 0.1 | V | IO=0.05 mA; VI=VIH or VIL; VCC=1.5 V; -55 to 125 °C column | 3 | ||
| Low Level Output Voltage | VOL | 0.5 | V | IO=12 mA; VI=VIH or VIL; VCC=3 V; -55 to 125 °C column | 3 | ||
| Low Level Output Voltage | VOL | 1.65 | V | IO=75 mA (Note 6, 7); VCC=5.5 V; -40 to 85 °C column | 3 | ||
| Input Leakage Current | II | -1 | 1 | µA | VI=VCC or GND; VCC=5.5 V; -55 to 125 °C column | 3 | |
| Quiescent Supply Current MSI | ICC | 160 | µA | VI=VCC or GND; IO=0; VCC=5.5 V; -55 to 125 °C column | 3 | ||
| Propagation Delay An or Bn to COUT; CIN to Sn; CIN to COUT | tPLH, tPHL | 219 | ns | VCC=1.5 V; Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 | ||
| Propagation Delay An or Bn to COUT; CIN to Sn; CIN to COUT | tPLH, tPHL | 6.2 | 24.6 | ns | VCC=3.3 V (Note 9: min at 3.6 V, max at 3 V); Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 | |
| Propagation Delay An or Bn to COUT; CIN to Sn; CIN to COUT | tPLH, tPHL | 4.4 | 17.6 | ns | VCC=5 V (Note 10: min at 5.5 V, max at 4.5 V); Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 | |
| Propagation Delay An or Bn to Sn | tPLH, tPHL | 228 | ns | VCC=1.5 V; Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 | ||
| Propagation Delay An or Bn to Sn | tPLH, tPHL | 6.4 | 25.5 | ns | VCC=3.3 V; Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 | |
| Propagation Delay An or Bn to Sn | tPLH, tPHL | 4.6 | 18.2 | ns | VCC=5 V; Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 | |
| Input Capacitance | CI | 10 | pF | 4 | |||
| Supply Voltage Range, VCC (AC types) | VCC | 1.5 | 5.5 | V | AC types | 2 | |
| Temperature Range | TA | -55 | 125 | °C | 2 | ||
| DC Input or Output Voltage | VI, VO | 0 | V | Maximum is VCC (printed as 0V to VCC) | 2 | ||
| Input Rise and Fall Slew Rate | dt/dv | 50 | ns | AC types, 1.5 V to 3 V | 2 | ||
| Input Rise and Fall Slew Rate | dt/dv | 20 | ns | AC types, 3.6 V to 5.5 V | 2 | ||
| DC Supply Voltage | VCC | -0.5 | 6 | V | 2 | ||
| DC Input Diode Current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 2 | |
| DC Output Diode Current | IOK | -50 | 50 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 2 | |
| DC Output Source or Sink Current per Output Pin | IO | -50 | 50 | mA | VO > -0.5 V or VO < VCC + 0.5 V | 2 | |
| DC VCC or Ground Current | ICC, IGND | -100 | 100 | mA | Note 3: for up to 4 outputs per device, add ±25 mA for each additional output | 2 | |
| Maximum Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Maximum Junction Temperature (Plastic Package) | 150 | °C | Plastic package | 2 | |||
| Maximum Lead Temperature (Soldering) | 300 | °C | Soldering 10 s | 2 | |||
| Thermal Impedance, junction to ambient (SOIC package) | θJA | 73 | °C/W | SOIC package; typical; per JESD 51 (Note 5) | 2 |
CAD (KiCad official)
- Symbol:
CD74AC283M96 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd74ac283m96-etched.step/cd74ac283m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74ac283m96.step/cd74ac283m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (14 pp, sha256
eb2959748d389204, retrieved 2026-11-06, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD74AC283M96
**Texas Instruments** · Specialty Logic · SOIC-16
CD74AC283M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | output | Sum output bit 1. |
| 2 | B1 | input | Operand B bit 1. |
| 3 | A1 | input | Operand A bit 1. |
| 4 | S0 | output | Sum output bit 0. |
| 5 | A0 | input | Operand A bit 0. |
| 6 | B0 | input | Operand B bit 0. |
| 7 | CIN | input | Carry input; tie low when there is no carry-in (positive logic). |
| 8 | GND | power_in | Ground. |
| 9 | COUT | output | Carry output, high when the sum exceeds 15. |
| 10 | S3 | output | Sum output bit 3. |
| 11 | B3 | input | Operand B bit 3. |
| 12 | A3 | input | Operand A bit 3. |
| 13 | S2 | output | Sum output bit 2. |
| 14 | A2 | input | Operand A bit 2. |
| 15 | B2 | input | Operand B bit 2. |
| 16 | VCC | power_in | Supply, 1.5 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High Level Input Voltage | VIH | 1.2 | | | V | VCC=1.5 V; -55 to 125 °C column | 2 |
| High Level Input Voltage | VIH | 2.1 | | | V | VCC=3 V; -55 to 125 °C column | 2 |
| High Level Input Voltage | VIH | 3.85 | | | V | VCC=5.5 V; -55 to 125 °C column | 2 |
| Low Level Input Voltage | VIL | | | 0.3 | V | VCC=1.5 V; -55 to 125 °C column | 2 |
| Low Level Input Voltage | VIL | | | 0.9 | V | VCC=3 V; -55 to 125 °C column | 2 |
| Low Level Input Voltage | VIL | | | 1.65 | V | VCC=5.5 V; -55 to 125 °C column | 2 |
| High Level Output Voltage | VOH | 1.4 | | | V | IO=-0.05 mA; VI=VIH or VIL; VCC=1.5 V; -55 to 125 °C column | 2 |
| High Level Output Voltage | VOH | 2.9 | | | V | IO=-0.05 mA; VI=VIH or VIL; VCC=3 V; -55 to 125 °C column | 2 |
| High Level Output Voltage | VOH | 4.4 | | | V | IO=-0.05 mA; VI=VIH or VIL; VCC=4.5 V; -55 to 125 °C column | 2 |
| High Level Output Voltage | VOH | 2.4 | | | V | IO=-4 mA; VI=VIH or VIL; VCC=3 V; -55 to 125 °C column | 2 |
| High Level Output Voltage | VOH | 3.7 | | | V | IO=-24 mA; VI=VIH or VIL; VCC=4.5 V; -55 to 125 °C column | 2 |
| High Level Output Voltage | VOH | 3.85 | | | V | IO=-75 mA (Note 6, 7); VCC=5.5 V; -40 to 85 °C column | 2 |
| Low Level Output Voltage | VOL | | | 0.1 | V | IO=0.05 mA; VI=VIH or VIL; VCC=1.5 V; -55 to 125 °C column | 3 |
| Low Level Output Voltage | VOL | | | 0.5 | V | IO=12 mA; VI=VIH or VIL; VCC=3 V; -55 to 125 °C column | 3 |
| Low Level Output Voltage | VOL | | | 1.65 | V | IO=75 mA (Note 6, 7); VCC=5.5 V; -40 to 85 °C column | 3 |
| Input Leakage Current | II | -1 | | 1 | µA | VI=VCC or GND; VCC=5.5 V; -55 to 125 °C column | 3 |
| Quiescent Supply Current MSI | ICC | | | 160 | µA | VI=VCC or GND; IO=0; VCC=5.5 V; -55 to 125 °C column | 3 |
| Propagation Delay An or Bn to COUT; CIN to Sn; CIN to COUT | tPLH, tPHL | | | 219 | ns | VCC=1.5 V; Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 |
| Propagation Delay An or Bn to COUT; CIN to Sn; CIN to COUT | tPLH, tPHL | 6.2 | | 24.6 | ns | VCC=3.3 V (Note 9: min at 3.6 V, max at 3 V); Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 |
| Propagation Delay An or Bn to COUT; CIN to Sn; CIN to COUT | tPLH, tPHL | 4.4 | | 17.6 | ns | VCC=5 V (Note 10: min at 5.5 V, max at 4.5 V); Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 |
| Propagation Delay An or Bn to Sn | tPLH, tPHL | | | 228 | ns | VCC=1.5 V; Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 |
| Propagation Delay An or Bn to Sn | tPLH, tPHL | 6.4 | | 25.5 | ns | VCC=3.3 V; Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 |
| Propagation Delay An or Bn to Sn | tPLH, tPHL | 4.6 | | 18.2 | ns | VCC=5 V; Input tr, tf = 3 ns; CL=50 pF; -55 to 125 °C column | 4 |
| Input Capacitance | CI | | | 10 | pF | | 4 |
| Supply Voltage Range, VCC (AC types) | VCC | 1.5 | | 5.5 | V | AC types | 2 |
| Temperature Range | TA | -55 | | 125 | °C | | 2 |
| DC Input or Output Voltage | VI, VO | 0 | | | V | Maximum is VCC (printed as 0V to VCC) | 2 |
| Input Rise and Fall Slew Rate | dt/dv | | | 50 | ns | AC types, 1.5 V to 3 V | 2 |
| Input Rise and Fall Slew Rate | dt/dv | | | 20 | ns | AC types, 3.6 V to 5.5 V | 2 |
| DC Supply Voltage | VCC | -0.5 | | 6 | V | | 2 |
| DC Input Diode Current | IIK | -20 | | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 2 |
| DC Output Diode Current | IOK | -50 | | 50 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 2 |
| DC Output Source or Sink Current per Output Pin | IO | -50 | | 50 | mA | VO > -0.5 V or VO < VCC + 0.5 V | 2 |
| DC VCC or Ground Current | ICC, IGND | -100 | | 100 | mA | Note 3: for up to 4 outputs per device, add ±25 mA for each additional output | 2 |
| Maximum Storage Temperature Range | | -65 | | 150 | °C | | 2 |
| Maximum Junction Temperature (Plastic Package) | | | | 150 | °C | Plastic package | 2 |
| Maximum Lead Temperature (Soldering) | | | | 300 | °C | Soldering 10 s | 2 |
| Thermal Impedance, junction to ambient (SOIC package) | θJA | | 73 | | °C/W | SOIC package; typical; per JESD 51 (Note 5) | 2 |
## CAD (KiCad official)
- Symbol: `CD74AC283M96`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `cd74ac283m96-etched.step` / `cd74ac283m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74ac283m96.step` / `cd74ac283m96.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd74ac283m96.pdf) (14 pp, sha256 `eb2959748d389204`, retrieved 2026-11-06, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd74ac283m96-datasheet.pdf)