component
CD74AC05PWR
Public Made by Adomby adom
Texas Instruments Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 6d ago |
| viewers | 6d ago |
| cd74ac05pwr-etched.glb | 6d ago |
| cd74ac05pwr-etched.step | 6d ago |
| cd74ac05pwr-hero.glb | 6d ago |
| cd74ac05pwr-hero.overlay.json | 6d ago |
| cd74ac05pwr.glb | 6d ago |
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| cd74ac05pwr.lbr | 6d ago |
| cd74ac05pwr.step | 6d ago |
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| README.md | 6d ago |
CD74AC05PWR
Texas Instruments · Inverters · TSSOP-14
CD74AC05PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input of inverter 1, where the output 1Y follows Y = A with open-drain output. |
| 2 | 1Y | output | Open-drain output of inverter 1 that requires an external pullup resistor to operate correctly. |
| 3 | 2A | input | Input of inverter 2, where the output 2Y follows Y = A with open-drain output. |
| 4 | 2Y | output | Open-drain output of inverter 2 that requires an external pullup resistor to operate correctly. |
| 5 | 3A | input | Input of inverter 3, where the output 3Y follows Y = A with open-drain output. |
| 6 | 3Y | output | Open-drain output of inverter 3 that requires an external pullup resistor to operate correctly. |
| 7 | GND | power_in | Ground pin, which must be connected to the device ground for correct operation. |
| 8 | 4Y | output | Open-drain output of inverter 4 that requires an external pullup resistor to operate correctly. |
| 9 | 4A | input | Input of inverter 4, where the output 4Y follows Y = A with open-drain output. |
| 10 | 5Y | output | Open-drain output of inverter 5 that requires an external pullup resistor to operate correctly. |
| 11 | 5A | input | Input of inverter 5, where the output 5Y follows Y = A with open-drain output. |
| 12 | 6Y | output | Open-drain output of inverter 6 that requires an external pullup resistor to operate correctly. |
| 13 | 6A | input | Input of inverter 6, where the output 6Y follows Y = A with open-drain output. |
| 14 | VCC | power_in | Supply pin, operating from 1.5 V to 5.5 V per the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 1.5 | 5.5 | V | 4 | ||
| High-level input voltage | VIH | 1.2 | V | VCC = 1.5 V | 4 | ||
| High-level input voltage | VIH | 2.1 | V | VCC = 3 V | 4 | ||
| High-level input voltage | VIH | 3.85 | V | VCC = 5.5 V | 4 | ||
| Low-level input voltage | VIL | 0.3 | V | VCC = 1.5 V | 4 | ||
| Low-level input voltage | VIL | 0.9 | V | VCC = 3 V | 4 | ||
| Low-level input voltage | VIL | 1.65 | V | VCC = 5.5 V | 4 | ||
| Input voltage | VI | 0 | V | maximum is VCC | 4 | ||
| Output voltage | VO | 0 | 5.5 | V | 4 | ||
| Low-level output current | IOL | 24 | mA | VCC = 4.5 V to 5.5 V | 4 | ||
| Input transition rise or fall rate | Δt/Δv | 50 | ns/V | VCC = 1.5 V to 3 V | 4 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC = 3.6 V to 5.5 V | 4 | ||
| Supply voltage range | VCC | -0.5 | 6 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 4 | |
| Output clamp current | IOK | -50 | mA | VO < 0 | 4 | ||
| Continuous current | IO | -50 | 50 | mA | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Electrostatic discharge, Human body model | V(ESD) | -2000 | 2000 | V | HBM, per ANSI/ESDA/JEDEC JS-001, all pins | 4 | |
| Junction-to-ambient thermal resistance (PW TSSOP, 14 pins) | RθJA | 132.2 | °C/W | PW (TSSOP) package, 14 pins | 4 | ||
| Low-level output voltage | VOL | 0.1 | V | VI = VIH or VIL, IOL = 50 μA, VCC = 1.5 V | 5 | ||
| Low-level output voltage | VOL | 0.36 | V | VI = VIH or VIL, IOL = 12 mA, VCC = 3 V, TA = 25°C | 5 | ||
| Low-level output voltage | VOL | 0.44 | V | VI = VIH or VIL, IOL = 12 mA, VCC = 3 V, TA = -40°C to 85°C | 5 | ||
| Low-level output voltage | VOL | 0.5 | V | VI = VIH or VIL, IOL = 12 mA, VCC = 3 V, TA = -55°C to 125°C | 5 | ||
| Low-level output voltage | VOL | 1.65 | V | VI = VIH or VIL, IOL = 50 mA(1), VCC = 5.5 V | 5 | ||
| Input current | II | -0.1 | 0.1 | μA | VI = VCC or GND, VCC = 5.5 V, TA = 25°C | 5 | |
| Input current | II | -1 | 1 | μA | VI = VCC or GND, VCC = 5.5 V, TA = -40°C to 85°C | 5 | |
| Supply current | ICC | 4 | μA | VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = 25°C | 5 | ||
| Supply current | ICC | 40 | μA | VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = -40°C to 85°C | 5 | ||
| Supply current | ICC | 80 | μA | VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = -55°C to 125°C | 5 | ||
| Input capacitance | CI | 10 | pF | 5 | |||
| Power dissipation capacitance | Cpd | 105 | pF | VCC = 5 V, TA = 25°C | 6 | ||
| Propagation delay tPLZ, A to Y | tPLZ | 94 | ns | VCC = 1.5 V, CL = 50 pF, TA = -40°C to 85°C | 5 | ||
| Propagation delay tPLZ, A to Y | tPLZ | 103 | ns | VCC = 1.5 V, CL = 50 pF, TA = -55°C to 125°C | 5 | ||
| Propagation delay tPZL, A to Y | tPZL | 74 | ns | VCC = 1.5 V, CL = 50 pF, TA = -40°C to 85°C | 5 | ||
| Propagation delay tPZL, A to Y | tPZL | 81 | ns | VCC = 1.5 V, CL = 50 pF, TA = -55°C to 125°C | 5 | ||
| Propagation delay tPLZ, A to Y | tPLZ | 3 | 10.4 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, TA = -40°C to 85°C | 5 | |
| Propagation delay tPLZ, A to Y | tPLZ | 2.9 | 11.5 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, TA = -55°C to 125°C | 5 | |
| Propagation delay tPZL, A to Y | tPZL | 2.3 | 8.3 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, TA = -40°C to 85°C | 5 | |
| Propagation delay tPZL, A to Y | tPZL | 2.3 | 9.1 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF, TA = -55°C to 125°C | 5 | |
| Propagation delay tPLZ, A to Y | tPLZ | 2.2 | 7.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF, TA = -40°C to 85°C | 5 | |
| Propagation delay tPLZ, A to Y | tPLZ | 2.1 | 8.2 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF, TA = -55°C to 125°C | 5 | |
| Propagation delay tPZL, A to Y | tPZL | 1.7 | 5.9 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF, TA = -40°C to 85°C | 5 | |
| Propagation delay tPZL, A to Y | tPZL | 1.6 | 6.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF, TA = -55°C to 125°C | 5 |
CAD (KiCad official)
- Symbol:
CD74AC05PWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd74ac05pwr-etched.step/cd74ac05pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74ac05pwr.step/cd74ac05pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
7c591345c6927e4a, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).