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docs cd74ac04m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cd74ac04m96: viewers · Ray
cd74ac04m96-etched.fit.json cd74ac04m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74ac04m96-etched.glb cd74ac04m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74ac04m96-etched.step cd74ac04m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74ac04m96.glb Publish 0.1.0 · Ray
cd74ac04m96.kicad_mod Publish 0.1.0 · Ray
cd74ac04m96.kicad_sym Publish 0.1.0 · Ray
cd74ac04m96.lbr Publish 0.1.0 · Ray
cd74ac04m96.step Publish 0.1.0 · Ray
package.json cd74ac04m96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json cd74ac04m96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/cd74ac04m96 · Ray

CD74AC04M96

Texas Instruments · Inverters · SOIC-14

CD74AC04M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input to inverter gate 1; accepts voltage from 0 to VCC
2 1Y output Output from inverter gate 1; sources up to 24 mA or sinks up to 24 mA
3 2A input Input to inverter gate 2; accepts voltage from 0 to VCC
4 2Y output Output from inverter gate 2; sources up to 24 mA or sinks up to 24 mA
5 3A input Input to inverter gate 3; accepts voltage from 0 to VCC
6 3Y output Output from inverter gate 3; sources up to 24 mA or sinks up to 24 mA
7 GND power_in Ground; provides 0V reference for logic signals
8 4Y output Output from inverter gate 4; sources up to 24 mA or sinks up to 24 mA
9 4A input Input to inverter gate 4; accepts voltage from 0 to VCC
10 5Y output Output from inverter gate 5; sources up to 24 mA or sinks up to 24 mA
11 5A input Input to inverter gate 5; accepts voltage from 0 to VCC
12 6Y output Output from inverter gate 6; sources up to 24 mA or sinks up to 24 mA
13 6A input Input to inverter gate 6; accepts voltage from 0 to VCC
14 VCC power_in Positive supply voltage; 1.5V to 5.5V operating range

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD74AC04M96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd74ac04m96-etched.step / cd74ac04m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74ac04m96.step / cd74ac04m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 8d062db858e4338f, retrieved 2026-09-25, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF