component
CD5041ITS
Public Made by Adomby adom
Shenzhen CYT Semicon Tech DC-DC Converters, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
CD5041ITS
Shenzhen CYT Semicon Tech · DC-DC Converters · TSSOP-16
CD5041ITS from Shenzhen CYT Semicon Tech, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input pin with an input range of +15V to +100V (recommended operating 15V to 90V). |
| 2 | FB | input | Feedback pin, inverting input of the internal error amplifier, whose non-inverting input is tied to the 0.75V reference. |
| 3 | COMP | output | Internal error amplifier output with an internal 5kΩ pull-up resistor; the error amplifier provides an active sink. |
| 4 | REF | power_out | Reference voltage output with a maximum output current of 10mA, to be decoupled locally with a 0.1μF capacitor; it stays low until UV and VCCUV are satisfied. |
| 5 | HD | output | Buck switch PWM control output whose maximum duty cycle is clamped to correspond to a typical 240ns off-time each cycle. |
| 6 | LD | output | Synchronous switch control output, the inverse of the HD output, able to drive a synchronous rectifier switch via an LM5101 or LM5102 low-side driver. |
| 7 | VCC | power_out | Output of the internal high-voltage regulator (VCCReg 8.7V to 9.3V); the internal start-up regulator shuts off if an auxiliary winding raises this pin above the regulation set point, reducing IC power dissipation. |
| 8 | PUSH | output | Push-pull gate driver output with 1.5A peak output capability. |
| 9 | PULL | output | Push-pull gate driver output with 1.5A peak output capability. |
| 10 | PGND | power_in | Power ground, connected directly to analog ground. |
| 11 | AGND | power_in | Analog ground, connected directly to power ground. |
| 12 | CS | input | Current sense input with 50ns leading-edge blanking; a separate dedicated comparator enters cycle-by-cycle current limit if CS exceeds 0.5V. |
| 13 | SS | passive | Soft-start control pin where an external capacitor and the internal 10μA current source set the soft-start ramp. |
| 14 | TIME | passive | Push-pull overlap and dead time control pin where RSET to GND produces overlap time and RSET to REF produces dead time. |
| 15 | RT/SYNC | bidirectional | Oscillator timing resistor pin where an external resistor sets the oscillator frequency; it also accepts an external oscillator for synchronization. |
| 16 | UVLO | input | Line undervoltage shutdown pin set by an external divider from the converter source, with a 2.5V operating threshold and hysteresis set by an internal 20μA current source. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen CYT Semicon Tech |
| Package | TSSOP-16 |
| Category | Power Management |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD5041ITS - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd5041its-etched.step/cd5041its-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd5041its.step/cd5041its.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen CYT Semicon Tech datasheet (12 pp, sha256
97cc9a67c1f29f9b, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).