component
CD5035IHTS
Public Made by Adomby adom
Shenzhen CYT Semicon Tech DC-DC Converters, HTSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "cd5035ihts",
"version": "0.1.0",
"type": "component",
"description": "Shenzhen CYT Semicon Tech DC-DC Converters, HTSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"cd5035ihts",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
},
"files": [
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"README.md",
"cd5035ihts.kicad_sym",
"cd5035ihts.kicad_mod",
"cd5035ihts.glb",
"cd5035ihts.step",
"cd5035ihts.lbr",
"docs/hero.png",
"docs/cd5035ihts-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cd5035ihts-hero.glb",
"cd5035ihts-hero.overlay.json",
"cd5035ihts-etched.glb"
],
"component": {
"mpn": "CD5035IHTS",
"manufacturer": "Shenzhen CYT Semicon Tech",
"package": "HTSSOP-20",
"pin_count": 21,
"category": "Power Management (PMIC)",
"subcategory": "DC-DC Converters",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590917178906521600",
"parts": {
"symbol": "cd5035ihts.kicad_sym",
"footprint": "cd5035ihts.kicad_mod",
"model_3d": "cd5035ihts-hero.glb",
"model_3d_plain": "cd5035ihts-etched.glb",
"model_3d_step": "cd5035ihts-etched.step",
"model_3d_step_plain": "cd5035ihts.step",
"lbr": "cd5035ihts.lbr"
},
"distributor_links": {
"lcsc": "C7502980"
},
"distributor_check": {
"checked_at": "2026-10-19T08:35:31Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "error"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "RAMP",
"type": "input",
"description": "Ramp modulation pin, where an external RC network on VIN sets the ramp slope, and an internal FET discharges it at the end of each cycle."
},
{
"number": "2",
"name": "UVLO",
"type": "input",
"description": "Input undervoltage lockout pin, where an external divider sets the shutdown and standby levels; VCC and REF regulators enable at 0.4V, SS is released at the 1.25V threshold, and hysteresis is a 23µA current sink."
},
{
"number": "3",
"name": "OVP",
"type": "input",
"description": "Input overvoltage protection pin, where an external divider sets the shutdown level against a 1.25V threshold, with 23µA hysteresis current supplied by an internal source."
},
{
"number": "4",
"name": "COMP",
"type": "input",
"description": "Pulse-width adjust input, where optocoupler current feeds an internal NPN current mirror; duty cycle is maximum at zero input current and falls to zero at 1mA."
},
{
"number": "5",
"name": "RT",
"type": "input",
"description": "Oscillator frequency control and sync clock input, typically biased at 2V; an external resistor from RT to AGND sets the free-running frequency, and external sync can run above that frequency."
},
{
"number": "6",
"name": "AGND",
"type": "power_in",
"description": "Analog ground pin, connected directly to the power supply ground."
},
{
"number": "7",
"name": "CS",
"type": "input",
"description": "Current sense input; the output pulse is terminated cycle by cycle when CS exceeds 0.25V, and CS is held low for 50ns after the leading-edge blanking time."
},
{
"number": "8",
"name": "SS",
"type": "passive",
"description": "Soft-start input, where an internal 55µA source charges the external capacitor to set the soft-start rate, reduced to 1.2µA during current-limit restart sequences."
},
{
"number": "9",
"name": "DLY",
"type": "passive",
"description": "Timing programming pin, where an external resistor to ground sets the non-overlap time between HO to SR1 and LO to SR2."
},
{
"number": "10",
"name": "RES",
"type": "passive",
"description": "Restart timing pin, which receives 22µA into its capacitor on any cycle exceeding cycle-by-cycle current limit; at 2.5V the soft-start capacitor is fully discharged and then released with a 1.2µA pull-up."
},
{
"number": "11",
"name": "HB",
"type": "power_in",
"description": "Bootstrap pin for the HO driver, requiring an external diode from VCC and an external capacitor from HS to supply the high-side gate driver."
},
{
"number": "12",
"name": "HS",
"type": "passive",
"description": "Switch node, the common connection of the transformer and the two power switches, providing the return path for the HO gate driver."
},
{
"number": "13",
"name": "HO",
"type": "output",
"description": "High-side PWM gate drive output, rated to sink 2A peak current."
},
{
"number": "14",
"name": "LO",
"type": "output",
"description": "Low-side PWM gate drive output, rated to sink 2A peak current."
},
{
"number": "15",
"name": "PGND",
"type": "power_in",
"description": "Power ground pin, connected directly to the analog ground."
},
{
"number": "16",
"name": "VCC",
"type": "power_in",
"description": "High-voltage start-up regulator pin; the start regulator turns off when an auxiliary winding raises this pin above the setpoint, and the recommended VCC range is 8V to 15V."
},
{
"number": "17",
"name": "SR2",
"type": "output",
"description": "Synchronous rectifier drive output 2, controlling the sync FET gate with 0.5A peak current capability."
},
{
"number": "18",
"name": "SR1",
"type": "output",
"description": "Synchronous rectifier drive output 1, controlling the sync FET gate with 0.5A peak current capability."
},
{
"number": "19",
"name": "REF",
"type": "power_out",
"description": "Reference voltage output with a maximum output current of 20mA, decoupled locally with a 0.1pF capacitor as printed in the datasheet."
},
{
"number": "20",
"name": "VIN",
"type": "power_in",
"description": "Power input pin with an operating input range of 13V to 105V; supplies outside this range can be applied directly to VCC through an external regulator."
},
{
"number": "21",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: REF decoupling capacitor is printed as '0.1pF', which is probably a typo (likely 0.1µF). Reported as; The datasheet does not state KiCad electrical types for any pin. Types were assigned from the functi; DLY is labeled an 'output' pin in the datasheet, but its function is a resistor-programmed timing no",
"exposed pad 21 added from the footprint"
],
"pages_sent": 13,
"cost_usd": 0.0565,
"at": "2026-10-19T08:32:35"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590917178906521600",
"pages": 13,
"sha256": "c542b47ea5017dae",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 21,
"described": 21,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
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"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "99af96f1da5c85ddc070f2922af0f1da04923f49457f10632d79895dd1142e27",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cd5035ihts-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"sha256": "c1f8d0d09273758793e6458bad48438575e15ff8dcf33d70b7121b7a8a292bb9",
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}
]
}
}