component
CD4584BM
Public Made by Adomby adom
lingxingic Inverters, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4584BM
lingxingic · Inverters · SOP-14
CD4584BM from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I1 | input | Schmitt-trigger data input of inverter 1; input voltage must stay between -0.5 V and VDD+0.5 V (absolute maximum ratings). |
| 2 | O1 | output | Data output of inverter 1, which is the logic inverse of I1 per the function table (H in gives L out, L in gives H out). |
| 3 | I2 | input | Schmitt-trigger data input of inverter 2; input voltage must stay between -0.5 V and VDD+0.5 V (absolute maximum ratings). |
| 4 | O2 | output | Data output of inverter 2, which is the logic inverse of I2 per the function table. |
| 5 | I3 | input | Schmitt-trigger data input of inverter 3; input voltage must stay between -0.5 V and VDD+0.5 V (absolute maximum ratings). |
| 6 | O3 | output | Data output of inverter 3, which is the logic inverse of I3 per the function table. |
| 7 | VSS | power_in | Ground supply voltage; all voltages in the datasheet are referenced to VSS (0 V). |
| 8 | O4 | output | Data output of inverter 4, which is the logic inverse of I4 per the function table. |
| 9 | I4 | input | Schmitt-trigger data input of inverter 4; input voltage must stay between -0.5 V and VDD+0.5 V (absolute maximum ratings). |
| 10 | O5 | output | Data output of inverter 5, which is the logic inverse of I5 per the function table. |
| 11 | I5 | input | Schmitt-trigger data input of inverter 5; input voltage must stay between -0.5 V and VDD+0.5 V (absolute maximum ratings). |
| 12 | O6 | output | Data output of inverter 6, which is the logic inverse of I6 per the function table. |
| 13 | I6 | input | Schmitt-trigger data input of inverter 6; input voltage must stay between -0.5 V and VDD+0.5 V (absolute maximum ratings). |
| 14 | VDD | power_in | Supply voltage, recommended 3 V to 15 V with an absolute maximum of 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VDD | -0.5 | 18 | V | voltages referenced to VSS | 5 | |
| input voltage | VI | -0.5 | V | all inputs; upper limit printed as VDD+0.5 V | 5 | ||
| DC input current | IIK | -10 | 10 | mA | any one input | 5 | |
| storage temperature | Tstg | -65 | 150 | ℃ | 5 | ||
| soldering temperature | TL | 260 | ℃ | 10s, SOP/TSSOP | 5 | ||
| supply voltage | VDD | 3 | 15 | V | 5 | ||
| ambient temperature | Tamb | -40 | 125 | ℃ | in free air | 5 | |
| HIGH-level input voltage | VIH | 2.05 | 3 | 3.85 | V | Tamb=-40℃ to +125℃; VDD=5V | 6 |
| HIGH-level input voltage | VIH | 4.8 | 6.4 | 7.7 | V | Tamb=-40℃ to +125℃; VDD=10V | 6 |
| HIGH-level input voltage | VIH | 7.8 | 9.9 | 11.7 | V | Tamb=-40℃ to +125℃; VDD=15V | 6 |
| LOW-level input voltage | VIL | 1.25 | 2.3 | 2.85 | V | Tamb=-40℃ to +125℃; VDD=5V | 6 |
| LOW-level input voltage | VIL | 2.4 | 3.8 | 5.1 | V | Tamb=-40℃ to +125℃; VDD=10V | 6 |
| LOW-level input voltage | VIL | 3.4 | 5.2 | 7.1 | V | Tamb=-40℃ to +125℃; VDD=15V | 6 |
| hysteresis voltage | VH | 0.1 | 0.65 | 1.4 | V | Tamb=-40℃ to +125℃; VDD=5V | 6 |
| hysteresis voltage | VH | 1.8 | 2.6 | 3.6 | V | Tamb=-40℃ to +125℃; VDD=10V | 6 |
| hysteresis voltage | VH | 3.7 | 4.7 | 5.7 | V | Tamb=-40℃ to +125℃; VDD=15V | 6 |
| HIGH-level output voltage | VOH | 4.95 | V | Tamb=-40℃ to +125℃; VDD=5V; /IO/<1uA | 6 | ||
| HIGH-level output voltage | VOH | 9.95 | V | Tamb=-40℃ to +125℃; VDD=10V; /IO/<1uA | 6 | ||
| HIGH-level output voltage | VOH | 14.95 | V | Tamb=-40℃ to +125℃; VDD=15V; /IO/<1uA | 6 | ||
| LOW-level output voltage | VOL | 0.05 | V | Tamb=-40℃ to +125℃; VDD=5V; /IO/<1uA | 6 | ||
| HIGH-level output current | IOH | -0.3 | mA | Tamb=-40℃ to +125℃; VDD=5V; VO=4.6V | 6 | ||
| HIGH-level output current | IOH | -1.15 | mA | Tamb=-40℃ to +125℃; VDD=5V; VO=2.5V | 6 | ||
| HIGH-level output current | IOH | -0.45 | mA | Tamb=-40℃ to +125℃; VDD=10V; VO=9.5V | 6 | ||
| HIGH-level output current | IOH | -1.4 | mA | Tamb=-40℃ to +125℃; VDD=15V; VO=13.5V | 6 | ||
| LOW-level output current | IOL | 0.29 | mA | Tamb=-40℃ to +125℃; VDD=5V; VO=0.4V | 6 | ||
| LOW-level output current | IOL | 0.38 | mA | Tamb=-40℃ to +125℃; VDD=10V; VO=0.5V | 6 | ||
| LOW-level output current | IOL | 1.2 | mA | Tamb=-40℃ to +125℃; VDD=15V; VO=1.5V | 6 | ||
| input leakage current | II | -4 | 4 | uA | Tamb=-40℃ to +125℃; VDD=15V; VI=15V or GND | 6 | |
| supply current | IDD | 7.5 | uA | Tamb=-40℃ to +125℃; VDD=5V; VI=5V or GND; IO=0A | 6 | ||
| supply current | IDD | 15 | uA | Tamb=-40℃ to +125℃; VDD=10V; VI=10V or GND; IO=0A | 6 | ||
| supply current | IDD | 30 | uA | Tamb=-40℃ to +125℃; VDD=15V; VI=15V or GND; IO=0A | 6 | ||
| propagation delay time | tPHL, tPLH | 240 | ns | Tamb=-40℃ to +125℃; VDD=5V; CL=50pF, see Figure 4 | 7 | ||
| propagation delay time | tPHL, tPLH | 120 | ns | Tamb=-40℃ to +125℃; VDD=10V; CL=50pF, see Figure 4 | 7 | ||
| propagation delay time | tPHL, tPLH | 96 | ns | Tamb=-40℃ to +125℃; VDD=15V; CL=50pF, see Figure 4 | 7 | ||
| transition time | tTHL, tTLH | 408 | ns | Tamb=-40℃ to +125℃; VDD=5V; CL=50pF, see Figure 4 | 7 | ||
| transition time | tTHL, tTLH | 192 | ns | Tamb=-40℃ to +125℃; VDD=10V; CL=50pF, see Figure 4 | 7 | ||
| transition time | tTHL, tTLH | 144 | ns | Tamb=-40℃ to +125℃; VDD=15V; CL=50pF, see Figure 4 | 7 | ||
| HIGH-level input voltage | VIH | 2.05 | 3 | 3.85 | V | Tamb=-40℃ to +85℃; VDD=5V | 5 |
| HIGH-level input voltage | VIH | 4.8 | 6.4 | 7.7 | V | Tamb=-40℃ to +85℃; VDD=10V | 5 |
| HIGH-level input voltage | VIH | 7.8 | 9.9 | 11.7 | V | Tamb=-40℃ to +85℃; VDD=15V | 5 |
| LOW-level input voltage | VIL | 1.25 | 2.3 | 2.85 | V | Tamb=-40℃ to +85℃; VDD=5V | 5 |
| HIGH-level output current | IOH | -0.34 | mA | Tamb=-40℃ to +85℃; VDD=5V; VO=4.6V | 5 | ||
| HIGH-level output current | IOH | -1.3 | mA | Tamb=-40℃ to +85℃; VDD=5V; VO=2.5V | 5 | ||
| HIGH-level output current | IOH | -0.55 | mA | Tamb=-40℃ to +85℃; VDD=10V; VO=9.5V | 5 | ||
| HIGH-level output current | IOH | -1.65 | mA | Tamb=-40℃ to +85℃; VDD=15V; VO=13.5V | 5 | ||
| LOW-level output current | IOL | 0.34 | mA | Tamb=-40℃ to +85℃; VDD=5V; VO=0.4V | 5 | ||
| LOW-level output current | IOL | 0.46 | mA | Tamb=-40℃ to +85℃; VDD=10V; VO=0.5V | 5 | ||
| input leakage current | II | -2 | 2 | uA | Tamb=-40℃ to +85℃; VDD=15V; VI=15V or GND | 5 | |
| propagation delay time | tPHL, tPLH | 80 | 200 | ns | Tamb=-40℃ to +85℃; VDD=5V; CL=50pF, see Figure 4 | 6 | |
| propagation delay time | tPHL, tPLH | 50 | 100 | ns | Tamb=-40℃ to +85℃; VDD=10V; CL=50pF, see Figure 4 | 6 | |
| propagation delay time | tPHL, tPLH | 40 | 80 | ns | Tamb=-40℃ to +85℃; VDD=15V; CL=50pF, see Figure 4 | 6 | |
| transition time | tTHL, tTLH | 170 | 340 | ns | Tamb=-40℃ to +85℃; VDD=5V; CL=50pF, see Figure 4 | 6 | |
| transition time | tTHL, tTLH | 80 | 160 | ns | Tamb=-40℃ to +85℃; VDD=10V; CL=50pF, see Figure 4 | 6 | |
| transition time | tTHL, tTLH | 60 | 120 | ns | Tamb=-40℃ to +85℃; VDD=15V; CL=50pF, see Figure 4 | 6 |
CAD (KiCad official)
- Symbol:
CD4584BM - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4584bm-etched.step/cd4584bm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4584bm.step/cd4584bm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (12 pp, sha256
a2065e8a27f43aea, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).