component
CD4541NS14ARDQ
Public Made by Adomby adom
GR Timers / Counters, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4541NS14ARDQ
GR · Timers / Counters · SOP-14
CD4541NS14ARDQ from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RTC | input | Timing pin of the built-in RC oscillator, which is set by external resistor and capacitor components; the datasheet gives only the name and input class for this pin. |
| 2 | CTC | input | Timing pin of the built-in RC oscillator, which is set by external resistor and capacitor components; the datasheet gives only the name and input class for this pin. |
| 3 | RS | input | External clock input that can be applied in place of the internal RC oscillator, with the oscillator frequency range stated as DC to 100 kHz. |
| 4 | NC | unconnected | Not connected. |
| 5 | AUTO RESET | input | Logic 0 enables the automatic power-on reset, which requires VDD greater than 5 V for reliable operation, and logic 1 disables it so counting starts only after a positive MASTER RESET pulse. |
| 6 | MASTER RESET | input | Logic 1 applies master reset, which clears the counter and disables the oscillator during reset, and logic 0 is master reset off. |
| 7 | VSS | power_in | Ground reference (0 V) for all voltages on the device. |
| 8 | OUTPUT | output | Timer output, taken as Q or Q-bar from the 8th, 10th, 13th or 16th counter stage as selected by inputs A and B. |
| 9 | Q/Q SELECT | output | Selects whether the output is initially low after reset (Q) or initially high after reset (Q-bar). |
| 10 | MODE | input | Logic 0 selects single transition mode and logic 1 selects recycle mode, which gives a continuous square wave at the oscillator frequency divided by 2^N. |
| 11 | NC | unconnected | Not connected. |
| 12 | A | input | Time-select input that, together with B, chooses the counter stage (8th, 10th, 13th or 16th) used for the output. |
| 13 | B | input | Time-select input that, together with A, chooses the counter stage (8th, 10th, 13th or 16th) used for the output. |
| 14 | VDD | power_in | Positive supply, specified for digital operation from 3 V to 18 V, with an absolute maximum of -0.5 V to 20 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOP-14 |
| Category | Clock/Timing |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage Range (referenced to VSS) | VDD | -0.5 | 20 | V | Voltage referenced to VSS | 4 | |
| Input Voltage Range, All Inputs | VI | -0.5 | V | All inputs; max printed as VDD+0.5 | 4 | ||
| Junction Temperature | TJ | 125 | ℃ | 4 | |||
| Operating Temperature | TOP | -40 | 85 | ℃ | 4 | ||
| Supply Current | IDD | 0 | 1 | uA | VIN=0, VDD=5 V, Ta=25℃ | 5 | |
| Output Low (Sink) Current | IOL | 2 | 4 | mA | VO=0.4 V, VIN=0, VDD=5 V, Ta=25℃ | 5 | |
| Output Low (Sink) Current | IOL | 5 | 10 | mA | VO=0.5 V, VIN=0, VDD=10 V, Ta=25℃ | 5 | |
| Output Low (Sink) Current | IOL | 15 | 35 | mA | VO=1.5 V, VIN=0, VDD=15 V, Ta=25℃ | 5 | |
| Output High (Source) Current | IOH | -1 | -2.5 | mA | VO=4.6 V, VIN=0, VDD=5 V, Ta=25℃ | 5 | |
| Output High (Source) Current | IOH | -5 | -10 | mA | VO=2.5 V, VIN=0, VDD=5 V, Ta=25℃ | 5 | |
| Output High (Source) Current | IOH | -2 | -5 | mA | VO=9.5 V, VIN=0, VDD=10 V, Ta=25℃ | 5 | |
| Output High (Source) Current | IOH | -10 | -20 | mA | VO=13.5 V, VIN=0, VDD=15 V, Ta=25℃ | 5 | |
| Output Voltage: Low-Level | VOL | 0 | 0.05 | V | VIN=0, VDD=5 V, Ta=25℃ | 5 | |
| Output Voltage: High-Level | VOH | 4.95 | 5 | V | VIN=0, VDD=5 V, Ta=25℃ | 5 | |
| Output Voltage: High-Level | VOH | 9.95 | 10 | V | VIN=0, VDD=10 V, Ta=25℃ | 5 | |
| Output Voltage: High-Level | VOH | 14.95 | 15 | V | VIN=0, VDD=15 V, Ta=25℃ | 5 | |
| Input Low Voltage | VIL | 1.5 | V | VO=0.5, 4.5 V, VDD=5 V, Ta=25℃ | 5 | ||
| Input Low Voltage | VIL | 3 | V | VO=1, 9 V, VDD=10 V, Ta=25℃ | 5 | ||
| Input Low Voltage | VIL | 4 | V | VO=1.5, 13.5 V, VDD=15 V, Ta=25℃ | 5 | ||
| Input High Voltage | VIH | 3.5 | V | VO=0.5, 4.5 V, VDD=5 V, Ta=25℃ | 5 | ||
| Input High Voltage | VIH | 7 | V | VO=1, 9 V, VDD=10 V, Ta=25℃ | 5 | ||
| Input High Voltage | VIH | 11 | V | VO=1.5, 13.5 V, VDD=15 V, Ta=25℃ | 5 | ||
| Input Current | II | 0 | 1 | uA | VIN=0, VDD=18 V, Ta=25℃ | 5 |
CAD (KiCad official)
- Symbol:
CD4541NS14ARDQ - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4541ns14ardq-etched.step/cd4541ns14ardq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4541ns14ardq.step/cd4541ns14ardq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (9 pp, sha256
082df2806cf2314a, retrieved 2026-11-06, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).