component
CD4541BPWR
Public Made by Adomby adom
Texas Instruments Timers / Counters, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4541BPWR
Texas Instruments · Timers / Counters · TSSOP-14
CD4541BPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RTC | passive | Timing resistor terminal for the internal RC oscillator; used with CTC (and RS) to set oscillator frequency per f = 1/(2.3·RTC·CTC), valid for f between 1kHz and 100kHz. |
| 2 | CTC | passive | Timing capacitor terminal for the internal RC oscillator; used with RTC to set the oscillator frequency (1kHz to 100kHz range). |
| 3 | RS | passive | Oscillator bias resistor terminal (RS ≥ 10kΩ, 2·RTC ≈ RS per oscillator equation); this pin can alternatively accept an external clock input in place of the internal oscillator. |
| 4 | NC | unconnected | No internal connection. |
| 5 | AUTO RESET | input | Logic 0 enables Auto Reset so counting starts automatically on power-up (recommended VDD > 5V for reliable auto reset); logic 1 disables Auto Reset, requiring a positive Master Reset pulse to start counting; enabling this input draws additional supply current. |
| 6 | MASTER RESET | input | A positive pulse on this input resets the internal counter and output latch; logic 0 = Master Reset off, logic 1 = Master Reset on. |
| 7 | VSS | power_in | Negative supply / ground reference terminal; all other pin voltages are referenced to VSS. |
| 8 | OUTPUT | output | Q or Q output taken from the selected counter stage (8th, 10th, 13th, or 16th stage as chosen by A and B); capable of driving six Low-Power TTL loads, three Low-Power Schottky loads, or six HTL loads over the rated temperature range. |
| 9 | Q/Q SELECT | input | Selects output polarity after reset: logic 0 gives output initially low after reset (Q), logic 1 gives output initially high after reset (Q̄). |
| 10 | MODE | input | Logic 1 sets Recycle mode, producing a continuous square wave at the oscillator frequency divided by 2^N; logic 0 sets Single-Transition mode, where the output changes state once after 2^(N-1) counts following a Master Reset. |
| 11 | NC | unconnected | No internal connection. |
| 12 | A | input | Time-select input A; used with input B to select the counter output stage per the Frequency Selection Table (e.g., A=0,B=0 selects N=13, count 8192). |
| 13 | B | input | Time-select input B; used with input A to select the counter output stage per the Frequency Selection Table (e.g., A=1,B=1 selects N=16, count 65536). |
| 14 | VDD | power_in | Positive supply voltage; operating range 3V (min) to 18V (typ) over the full temperature range, absolute maximum -0.5V to +20V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Clock/Timing |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD4541BPWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4541bpwr-etched.step/cd4541bpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4541bpwr.step/cd4541bpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
1c648629cd0ba6ed, retrieved 2026-09-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).