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Set visibility: public

Ray ·b602fc5968 · ·parent e61e0f5
1 file changed +9−6
page.json+9−6
@@ -38,19 +38,19 @@         "number": "1",         "name": "RTC",         "type": "passive",-        "description": "Timing resistor connection for RC oscillator per f=1/(2.3\u00d7RTC\u00d7CTC) with 2RTC\u2248CTC constraint, operating range 1kHz to 100kHz."+        "description": "Timing resistor connection for RC oscillator per f=1/(2.3×RTC×CTC) with 2RTC≈CTC constraint, operating range 1kHz to 100kHz."       },       {         "number": "2",         "name": "CTC",         "type": "passive",-        "description": "Timing capacitor connection for RC oscillator per f=1/(2.3\u00d7RTC\u00d7CTC) with 2RTC\u2248CTC constraint, operating range 1kHz to 100kHz."+        "description": "Timing capacitor connection for RC oscillator per f=1/(2.3×RTC×CTC) with 2RTC≈CTC constraint, operating range 1kHz to 100kHz."       },       {         "number": "3",         "name": "RS",         "type": "input",-        "description": "Series resistor connection for RC oscillator (RS \u2265 10k\u03a9 minimum) that alternatively accepts external clock input DC to 100kHz instead of internal oscillator."+        "description": "Series resistor connection for RC oscillator (RS ≥ 10kΩ minimum) that alternatively accepts external clock input DC to 100kHz instead of internal oscillator."       },       {         "number": "4",@@ -86,7 +86,7 @@         "number": "9",         "name": "Q/Q SELECT",         "type": "input",-        "description": "Output polarity select input; logic 0 selects Q output initially low after reset, logic 1 selects Q\u0304 output initially high after reset."+        "description": "Output polarity select input; logic 0 selects Q output initially low after reset, logic 1 selects Q̄ output initially high after reset."       },       {         "number": "10",@@ -104,7 +104,7 @@         "number": "12",         "name": "A",         "type": "input",-        "description": "Frequency select input A; combined with B input selects counter stage for frequency division factor: (A,B)=(0,0)\u219213-stage/8192, (0,1)\u219210-stage/1024, (1,0)\u21928-stage/256, (1,1)\u219216-stage/65536."+        "description": "Frequency select input A; combined with B input selects counter stage for frequency division factor: (A,B)=(0,0)→13-stage/8192, (0,1)→10-stage/1024, (1,0)→8-stage/256, (1,1)→16-stage/65536."       },       {         "number": "13",@@ -194,5 +194,8 @@     "docs/cd4541be-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file