component
CD4541BE
Public Made by Adomby adom
Texas Instruments Timers / Counters, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+50@@ -0,0 +1,50 @@+# CD4541BE++**Texas Instruments** · Timers / Counters · DIP-14++CD4541BE from Texas Instruments, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RTC | passive | Timing resistor connection for RC oscillator per f=1/(2.3×RTC×CTC) with 2RTC≈CTC constraint, operating range 1kHz to 100kHz. |+| 2 | CTC | passive | Timing capacitor connection for RC oscillator per f=1/(2.3×RTC×CTC) with 2RTC≈CTC constraint, operating range 1kHz to 100kHz. |+| 3 | RS | input | Series resistor connection for RC oscillator (RS ≥ 10kΩ minimum) that alternatively accepts external clock input DC to 100kHz instead of internal oscillator. |+| 4 | NC | unconnected | No connection. |+| 5 | AUTO RESET | input | Automatic reset input active low; logic 0 enables auto power-on reset circuit (requires VDD > 5V for reliable operation), logic 1 disables auto reset requiring positive MASTER RESET pulse to start counting. |+| 6 | MASTER RESET | input | Manual reset input active high; positive pulse resets 16-stage binary counter and output latch to high level; circuit is retriggerable. |+| 7 | VSS | power_in | Ground; negative power supply reference at 0V for all digital logic levels. |+| 8 | OUTPUT | output | Programmable frequency divider output selecting Q from counter stage selected by A/B inputs (8/10/13/16-stage); provides continuous f=fosc/2^N square wave at MODE=1 or single-transition pulse output at MODE=0. |+| 9 | Q/Q SELECT | input | Output polarity select input; logic 0 selects Q output initially low after reset, logic 1 selects Q̄ output initially high after reset. |+| 10 | MODE | input | Mode select input; logic 0 enables single-transition timer mode with output pulse after 2^(N-1) clock counts, logic 1 enables recycle mode with continuous f=fosc/2^N square wave output. |+| 11 | NC | unconnected | No connection. |+| 12 | A | input | Frequency select input A; combined with B input selects counter stage for frequency division factor: (A,B)=(0,0)→13-stage/8192, (0,1)→10-stage/1024, (1,0)→8-stage/256, (1,1)→16-stage/65536. |+| 13 | B | input | Frequency select input B; combined with A input selects counter stage for frequency divider ratio per frequency selection table. |+| 14 | VDD | power_in | Positive power supply; operating voltage 3V minimum to 18V typical, with 20V absolute maximum rating per JEDEC specification. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | DIP-14 |+| Category | Clock/Timing |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `CD4541BE`+- Footprint: `Package_DIP:DIP-14_W7.62mm`+- 3D model: DIP-14 (KiCad packages3D, STEP)+- 3D model files: `cd4541be-etched.step` / `cd4541be-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4541be.step` / `cd4541be.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4541b) (22 pp, sha256 `1c648629cd0ba6ed`, retrieved 2026-09-23, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4541be-datasheet.pdf)
page.jsonadded+177@@ -0,0 +1,177 @@+{+ "slug": "cd4541be",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Timers / Counters, DIP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "clock-timing",+ "cd4541be",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4541be.kicad_sym",+ "cd4541be.kicad_mod",+ "cd4541be.glb",+ "cd4541be.step",+ "cd4541be.lbr",+ "docs/hero.png",+ "docs/cd4541be-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD4541BE",+ "manufacturer": "Texas Instruments",+ "package": "DIP-14",+ "pin_count": 14,+ "category": "Clock/Timing",+ "subcategory": "Timers / Counters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd4541b",+ "parts": {+ "symbol": "cd4541be.kicad_sym",+ "footprint": "cd4541be.kicad_mod",+ "model_3d": "cd4541be-etched.glb",+ "model_3d_plain": "cd4541be.glb",+ "model_3d_step": "cd4541be-etched.step",+ "model_3d_step_plain": "cd4541be.step",+ "lbr": "cd4541be.lbr"+ },+ "distributor_links": {+ "lcsc": "C86649"+ },+ "pins": [+ {+ "number": "1",+ "name": "RTC",+ "type": "passive",+ "description": "Timing resistor connection for RC oscillator per f=1/(2.3×RTC×CTC) with 2RTC≈CTC constraint, operating range 1kHz to 100kHz."+ },+ {+ "number": "2",+ "name": "CTC",+ "type": "passive",+ "description": "Timing capacitor connection for RC oscillator per f=1/(2.3×RTC×CTC) with 2RTC≈CTC constraint, operating range 1kHz to 100kHz."+ },+ {+ "number": "3",+ "name": "RS",+ "type": "input",+ "description": "Series resistor connection for RC oscillator (RS ≥ 10kΩ minimum) that alternatively accepts external clock input DC to 100kHz instead of internal oscillator."+ },+ {+ "number": "4",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection."+ },+ {+ "number": "5",+ "name": "AUTO RESET",+ "type": "input",+ "description": "Automatic reset input active low; logic 0 enables auto power-on reset circuit (requires VDD > 5V for reliable operation), logic 1 disables auto reset requiring positive MASTER RESET pulse to start counting."+ },+ {+ "number": "6",+ "name": "MASTER RESET",+ "type": "input",+ "description": "Manual reset input active high; positive pulse resets 16-stage binary counter and output latch to high level; circuit is retriggerable."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground; negative power supply reference at 0V for all digital logic levels."+ },+ {+ "number": "8",+ "name": "OUTPUT",+ "type": "output",+ "description": "Programmable frequency divider output selecting Q from counter stage selected by A/B inputs (8/10/13/16-stage); provides continuous f=fosc/2^N square wave at MODE=1 or single-transition pulse output at MODE=0."+ },+ {+ "number": "9",+ "name": "Q/Q SELECT",+ "type": "input",+ "description": "Output polarity select input; logic 0 selects Q output initially low after reset, logic 1 selects Q̄ output initially high after reset."+ },+ {+ "number": "10",+ "name": "MODE",+ "type": "input",+ "description": "Mode select input; logic 0 enables single-transition timer mode with output pulse after 2^(N-1) clock counts, logic 1 enables recycle mode with continuous f=fosc/2^N square wave output."+ },+ {+ "number": "11",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection."+ },+ {+ "number": "12",+ "name": "A",+ "type": "input",+ "description": "Frequency select input A; combined with B input selects counter stage for frequency division factor: (A,B)=(0,0)→13-stage/8192, (0,1)→10-stage/1024, (1,0)→8-stage/256, (1,1)→16-stage/65536."+ },+ {+ "number": "13",+ "name": "B",+ "type": "input",+ "description": "Frequency select input B; combined with A input selects counter stage for frequency divider ratio per frequency selection table."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive power supply; operating voltage 3V minimum to 18V typical, with 20V absolute maximum rating per JEDEC specification."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 22,+ "cost_usd": 0.2442,+ "at": "2026-09-23T07:21:23"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd4541b",+ "pages": 22,+ "sha256": "1c648629cd0ba6ed",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}