component
CD4538SA16.TR
Public Made by Adomby adom
Wuxi I core Elec Monostable Multivibrators, SOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+52@@ -0,0 +1,52 @@+# CD4538SA16.TR++**Wuxi I core Elec** · Monostable Multivibrators · SOP-16++CD4538SA16.TR from Wuxi I core Elec, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1CEXT | passive | External capacitor connection for first monostable, always connected to ground for RC timing network. |+| 2 | 1REXT/CEXT | passive | External resistor/capacitor connection for first monostable; output pulse width tW = REXT×CEXT. |+| 3 | 1CD, | input | Direct reset input (active LOW) for first monostable; terminates output pulse immediately when driven LOW. |+| 4 | 1B | input | Low-to-HIGH triggered input for first monostable; triggers retriggerable output on positive edge. |+| 5 | 1A, | input | High-to-LOW triggered input for first monostable; triggers retriggerable output on negative edge. |+| 6 | 1Q | output | Output of first monostable producing HIGH-level pulse with width determined by REXT and CEXT. |+| 7 | 1Q, | output | Complementary output (active LOW) of first monostable producing LOW-level pulse with width determined by REXT and CEXT. |+| 8 | VSS | power_in | Ground reference, 0V, provides common return path for both monostables. |+| 9 | 2Q, | output | Complementary output (active LOW) of second monostable producing LOW-level pulse with width determined by REXT and CEXT. |+| 10 | 2Q | output | Output of second monostable producing HIGH-level pulse with width determined by REXT and CEXT. |+| 11 | 2A, | input | High-to-LOW triggered input for second monostable; triggers retriggerable output on negative edge. |+| 12 | 2B | input | Low-to-HIGH triggered input for second monostable; triggers retriggerable output on positive edge. |+| 13 | 2CD, | input | Clear direct input (active LOW) for second monostable; terminates output pulse immediately when driven LOW. |+| 14 | 2REXT/CEXT | passive | External resistor/capacitor connection for second monostable; output pulse width tW = REXT×CEXT. |+| 15 | 2CEXT | passive | External capacitor connection for second monostable, always connected to ground for RC timing network. |+| 16 | VDD | power_in | Supply voltage input; recommended operating range 3V to 12V referenced to VSS (ground). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Wuxi I core Elec |+| Package | SOP-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD4538SA16.TR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOP-16 (KiCad packages3D, STEP)+- 3D model files: `cd4538sa16-tr-etched.step` / `cd4538sa16-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4538sa16-tr.step` / `cd4538sa16-tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Wuxi I core Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590414466996338688) (16 pp, sha256 `5b3334b3a8c45688`, retrieved 2026-09-29, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4538sa16-tr-datasheet.pdf)
page.jsonadded+188@@ -0,0 +1,188 @@+{+ "slug": "cd4538sa16-tr",+ "version": "0.1.0",+ "type": "component",+ "description": "Wuxi I core Elec Monostable Multivibrators, SOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4538sa16.tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4538sa16-tr.kicad_sym",+ "cd4538sa16-tr.kicad_mod",+ "cd4538sa16-tr.glb",+ "cd4538sa16-tr.step",+ "cd4538sa16-tr.lbr",+ "docs/hero.png",+ "docs/cd4538sa16-tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD4538SA16.TR",+ "manufacturer": "Wuxi I core Elec",+ "package": "SOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Monostable Multivibrators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590414466996338688",+ "parts": {+ "symbol": "cd4538sa16-tr.kicad_sym",+ "footprint": "cd4538sa16-tr.kicad_mod",+ "model_3d": "cd4538sa16-tr-etched.glb",+ "model_3d_plain": "cd4538sa16-tr.glb",+ "model_3d_step": "cd4538sa16-tr-etched.step",+ "model_3d_step_plain": "cd4538sa16-tr.step",+ "lbr": "cd4538sa16-tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C5162255"+ },+ "distributor_check": {+ "checked_at": "2026-09-29T17:10:02Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": null,+ "status": "no match"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "1CEXT",+ "type": "passive",+ "description": "External capacitor connection for first monostable, always connected to ground for RC timing network."+ },+ {+ "number": "2",+ "name": "1REXT/CEXT",+ "type": "passive",+ "description": "External resistor/capacitor connection for first monostable; output pulse width tW = REXT×CEXT."+ },+ {+ "number": "3",+ "name": "1CD—",+ "type": "input",+ "description": "Direct reset input (active LOW) for first monostable; terminates output pulse immediately when driven LOW."+ },+ {+ "number": "4",+ "name": "1B",+ "type": "input",+ "description": "Low-to-HIGH triggered input for first monostable; triggers retriggerable output on positive edge."+ },+ {+ "number": "5",+ "name": "1A—",+ "type": "input",+ "description": "High-to-LOW triggered input for first monostable; triggers retriggerable output on negative edge."+ },+ {+ "number": "6",+ "name": "1Q",+ "type": "output",+ "description": "Output of first monostable producing HIGH-level pulse with width determined by REXT and CEXT."+ },+ {+ "number": "7",+ "name": "1Q—",+ "type": "output",+ "description": "Complementary output (active LOW) of first monostable producing LOW-level pulse with width determined by REXT and CEXT."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground reference, 0V, provides common return path for both monostables."+ },+ {+ "number": "9",+ "name": "2Q—",+ "type": "output",+ "description": "Complementary output (active LOW) of second monostable producing LOW-level pulse with width determined by REXT and CEXT."+ },+ {+ "number": "10",+ "name": "2Q",+ "type": "output",+ "description": "Output of second monostable producing HIGH-level pulse with width determined by REXT and CEXT."+ },+ {+ "number": "11",+ "name": "2A—",+ "type": "input",+ "description": "High-to-LOW triggered input for second monostable; triggers retriggerable output on negative edge."+ },+ {+ "number": "12",+ "name": "2B",+ "type": "input",+ "description": "Low-to-HIGH triggered input for second monostable; triggers retriggerable output on positive edge."+ },+ {+ "number": "13",+ "name": "2CD—",+ "type": "input",+ "description": "Clear direct input (active LOW) for second monostable; terminates output pulse immediately when driven LOW."+ },+ {+ "number": "14",+ "name": "2REXT/CEXT",+ "type": "passive",+ "description": "External resistor/capacitor connection for second monostable; output pulse width tW = REXT×CEXT."+ },+ {+ "number": "15",+ "name": "2CEXT",+ "type": "passive",+ "description": "External capacitor connection for second monostable, always connected to ground for RC timing network."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage input; recommended operating range 3V to 12V referenced to VSS (ground)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590414466996338688",+ "pages": 16,+ "sha256": "5b3334b3a8c45688",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}