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Contents

README

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CD4538SA16.TR

Wuxi I core Elec · Monostable Multivibrators · SOP-16

CD4538SA16.TR from Wuxi I core Elec, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CEXT passive External capacitor connection for first monostable, always connected to ground for RC timing network.
2 1REXT/CEXT passive External resistor/capacitor connection for first monostable; output pulse width tW = REXT×CEXT.
3 1CD, input Direct reset input (active LOW) for first monostable; terminates output pulse immediately when driven LOW.
4 1B input Low-to-HIGH triggered input for first monostable; triggers retriggerable output on positive edge.
5 1A, input High-to-LOW triggered input for first monostable; triggers retriggerable output on negative edge.
6 1Q output Output of first monostable producing HIGH-level pulse with width determined by REXT and CEXT.
7 1Q, output Complementary output (active LOW) of first monostable producing LOW-level pulse with width determined by REXT and CEXT.
8 VSS power_in Ground reference, 0V, provides common return path for both monostables.
9 2Q, output Complementary output (active LOW) of second monostable producing LOW-level pulse with width determined by REXT and CEXT.
10 2Q output Output of second monostable producing HIGH-level pulse with width determined by REXT and CEXT.
11 2A, input High-to-LOW triggered input for second monostable; triggers retriggerable output on negative edge.
12 2B input Low-to-HIGH triggered input for second monostable; triggers retriggerable output on positive edge.
13 2CD, input Clear direct input (active LOW) for second monostable; terminates output pulse immediately when driven LOW.
14 2REXT/CEXT passive External resistor/capacitor connection for second monostable; output pulse width tW = REXT×CEXT.
15 2CEXT passive External capacitor connection for second monostable, always connected to ground for RC timing network.
16 VDD power_in Supply voltage input; recommended operating range 3V to 12V referenced to VSS (ground).

Key specifications

Parameter Value
Manufacturer Wuxi I core Elec
Package SOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD4538SA16.TR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4538sa16-tr-etched.step / cd4538sa16-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4538sa16-tr.step / cd4538sa16-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Wuxi I core Elec datasheet (16 pp, sha256 5b3334b3a8c45688, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF