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CD4536NS16ARDQ

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GR Timers / Counters, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CD4536NS16ARDQ

GR · Timers / Counters · SOP-16

CD4536NS16ARDQ from GR, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SET input Set input, one of the control inputs in the truth table that forces OUT1, OUT2 and DECODE OUT to defined states together with RESET.
2 RESET input Reset input, one of the control inputs in the truth table; a logic 1 on 8-BYPASS, SET and RESET enables the fast test mode.
3 IN1 input Data input that serves as either the external clock input or the input to the on-chip RC oscillator.
4 OUT1 output Buffer output; also a connection terminal for the external RC components of the on-chip oscillator.
5 OUT2 output Buffer output; also a connection terminal for the external RC components of the on-chip oscillator.
6 8-BYPASS input Bypass input; a logic 1 bypasses the first 8 stages so that stage 9 becomes the first counter stage of the last 16 stages.
7 CLOCK INHIBIT input Clock inhibit input, which is listed as a control input in the truth table (CLOCK INH column).
8 VSS power_in Ground reference; all datasheet voltages are referenced to the VSS terminal.
9 A input Binary select input; with B, C and D it forms the BCD code that selects the decode output stage (A is the least significant bit).
10 B input Binary select input; with A, C and D it forms the BCD code that selects the decode output stage.
11 C input Binary select input; with A, B and D it forms the BCD code that selects the decode output stage.
12 D input Binary select input; the most significant bit of the BCD code that selects the decode output stage.
13 DECODE OUT output Decode output that carries the selected counter stage; MONO IN grounded through 10 kΩ or higher connects the decoder directly to this pin.
14 OSC INHIBIT input Oscillator inhibit input, listed as a control input in the truth table (OSC INH column).
15 MONO IN input Timing input for the on-chip monostable; a resistor to VDD and a capacitor to ground enable the one-shot and set its pulse width.
16 VDD power_in Positive supply voltage; absolute maximum DC supply range is -0.5 V to 20 V referenced to VSS.

Key specifications

Parameter Value
Manufacturer GR
Package SOP-16
Category Clock/Timing
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage Range (referenced to VSS) VDD -0.5 20 V Voltage referenced to VSS terminals 6
Input Voltage Range, All Inputs VI -0.5 V All inputs; printed max is VDD+0.5 (formula, not a number) 6
Power Dissipation PD 500 mW 6
Junction Temperature TJ 125 ℃ 6
Operating Temperature TOP -40 85 ℃ 6
Supply Current (5 V) IDD 0 1 uA VO=--; VIN=0,5 V; VDD=5 V; Ta=25℃ 6
Supply Current (10 V) IDD 0 1 uA VO=--; VIN=0,10 V; VDD=10 V; Ta=25℃ 6
Supply Current (18 V) IDD 0 1 uA VO=--; VIN=0,18 V; VDD=18 V; Ta=25℃ 6
Low Level Output Current (5 V) IOL 1 3 mA VO=0.4 V; VIN=0,5 V; VDD=5 V; Ta=25℃ 6
Low Level Output Current (10 V) IOL 3 7 mA VO=0.5 V; VIN=0,10 V; VDD=10 V; Ta=25℃ 6
Low Level Output Current (15 V) IOL 13 26 mA VO=1.5 V; VIN=0,15 V; VDD=15 V; Ta=25℃ 6
High Level Output Current (5 V, VO=4.6 V) IOH -0.5 -1.5 mA VO=4.6 V; VIN=0,5 V; VDD=5 V; Ta=25℃ 6
High Level Output Current (5 V, VO=2.5 V) IOH -3 -6 mA VO=2.5 V; VIN=0,5 V; VDD=5 V; Ta=25℃ 6
High Level Output Current (10 V) IOH -1.5 -3 mA VO=9.5 V; VIN=0,10 V; VDD=10 V; Ta=25℃ 6
High Level Output Current (15 V) IOH -6 -12 mA VO=13.5 V; VIN=0,15 V; VDD=15 V; Ta=25℃ 6
Low Level Output Voltage (5 V) VOL 0 0.05 V VIN=0,5 V; VDD=5 V; Ta=25℃ 6
Low Level Output Voltage (10 V) VOL 0 0.05 V VIN=0,10 V; VDD=10 V; Ta=25℃ 6
Low Level Output Voltage (15 V) VOL 0 0.05 V VIN=0,15 V; VDD=15 V; Ta=25℃ 6
High Level Output Voltage (5 V) VOH 4.95 5 V VIN=0,5 V; VDD=5 V; Ta=25℃ 6
High Level Output Voltage (10 V) VOH 9.95 10 V VIN=0,10 V; VDD=10 V; Ta=25℃ 6
High Level Output Voltage (15 V) VOH 14.95 15 V VIN=0,15 V; VDD=15 V; Ta=25℃ 6
Low Level Input Voltage (5 V) VIL 1.5 V VO=0.5,4.5 V; VDD=5 V; Ta=25℃ 6
Low Level Input Voltage (10 V) VIL 3 V VO=1,9 V; VDD=10 V; Ta=25℃ 6
Low Level Input Voltage (15 V) VIL 4 V VO=1.5,13.5 V; VDD=15 V; Ta=25℃ 6
High Level Input Voltage (5 V) VIH 3.5 V VO=0.5,4.5 V; VDD=5 V; Ta=25℃ 6
High Level Input Voltage (10 V) VIH 7 V VO=1,9 V; VDD=10 V; Ta=25℃ 6
High Level Input Voltage (15 V) VIH 11 V VO=1.5,13.5 V; VDD=15 V; Ta=25℃ 6
Input Leakage Current IIN -1 0 1 uA VIN=0,18 V; VDD=18 V; Ta=25℃; printed ±1 6

CAD (KiCad official)

  • Symbol: CD4536NS16ARDQ
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: cd4536ns16ardq-etched.step / cd4536ns16ardq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4536ns16ardq.step / cd4536ns16ardq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GR datasheet (11 pp, sha256 a32f430d65544000, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF